This Python API is meant to work with NI-RIO FPGA bitfiles, .lvbitx, and their associated XML Configurations, .fpgaconfig, originally written for VeriStand.
Any VeriStand FPGA should have an "Is Late?" single bit packet as the first packet in the DMA Read FIFO. The Unpack function currently doesn't handle this bit and simply passes it through without doing anything.
Any VeriStand FPGA should have an "Is Late?" single bit packet as the first packet in the DMA Read FIFO. The Unpack function currently doesn't handle this bit and simply passes it through without doing anything.