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Klaus2m5 / 6502_65C02_functional_tests

Tests for all valid opcodes of the 6502 and 65C02 processor
GNU General Public License v3.0
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65C02 TRB fails #4

Closed LIV2 closed 7 years ago

LIV2 commented 7 years ago

Hi,

I'm adding 65C02 support to an emulator and currently stuck on the TRB tests for 65C02

It completes an op1 loop, but appears to fail when OP2/$0B = $01 As you can see, AND $0B does not set the Zero flag because A=1 and $0B = 1.

I should note that this emulator passes the 6502 Tests with no issues so I'm really confused as to what is going on here.

ZPG values at failure time:

0008-000F  00 00 01 01 00 00 01 81

Trace log:

1CC2  98        TYA           A:01 X:C0 Y:01 F:21 S:1FF [..-....C]
1CC3  25 0B     AND $0B       A:01 X:C0 Y:01 F:21 S:1FF [..-....C]
1CC5  08        PHP           A:01 X:C0 Y:01 F:21 S:1FE [..-....C]
1CC6  68        PLA           A:31 X:C0 Y:01 F:21 S:1FF [..-....C]
1CC7  29 02     AND #$02      A:00 X:C0 Y:01 F:23 S:1FF [..-...ZC]
1CC9  85 0C     STA $0C       A:00 X:C0 Y:01 F:23 S:1FF [..-...ZC]
1CCB  98        TYA           A:01 X:C0 Y:01 F:21 S:1FF [..-....C]
1CCC  49 FF     EOR #$FF      A:FE X:C0 Y:01 F:A1 S:1FF [N.-....C]
1CCE  05 0B     ORA $0B       A:FF X:C0 Y:01 F:A1 S:1FF [N.-....C]
1CD0  49 FF     EOR #$FF      A:00 X:C0 Y:01 F:23 S:1FF [..-...ZC]
1CD2  85 0D     STA $0D       A:00 X:C0 Y:01 F:23 S:1FF [..-...ZC]
1CD4  98        TYA           A:01 X:C0 Y:01 F:21 S:1FF [..-....C]
1CD5  05 0B     ORA $0B       A:01 X:C0 Y:01 F:21 S:1FF [..-....C]
1CD7  85 0E     STA $0E       A:01 X:C0 Y:01 F:21 S:1FF [..-....C]
1CD9  84 0A     STY $0A       A:01 X:C0 Y:01 F:21 S:1FF [..-....C]
1CDB  A9 FF     LDA #$FF      A:FF X:C0 Y:01 F:A1 S:1FF [N.-....C]
1CDD  48        PHA           A:FF X:C0 Y:01 F:A1 S:1FE [N.-....C]
1CDE  A5 0B     LDA $0B       A:01 X:C0 Y:01 F:21 S:1FE [..-....C]
1CE0  28        PLP           A:01 X:C0 Y:01 F:FF S:1FF [NV-BDIZC]
1CE1  14 0A     TRB $0A       A:01 X:C0 Y:01 F:FF S:1FF [NV-BDIZC]
1CE3  08        PHP           A:01 X:C0 Y:01 F:FF S:1FE [NV-BDIZC]
1CE4  C5 0B     CMP $0B       A:01 X:C0 Y:01 F:7F S:1FE [.V-BDIZC]
1CE6  D0 FE     BNE $FE       A:01 X:C0 Y:01 F:7F S:1FE [.V-BDIZC]
1CE8  68        PLA           A:FF X:C0 Y:01 F:FD S:1FF [NV-BDI.C]
1CE9  48        PHA           A:FF X:C0 Y:01 F:FD S:1FE [NV-BDI.C]
1CEA  09 02     ORA #$02      A:FF X:C0 Y:01 F:FD S:1FE [NV-BDI.C]
1CEC  C9 FF     CMP #$FF      A:FF X:C0 Y:01 F:7F S:1FE [.V-BDIZC]
1CEE  D0 FE     BNE $FE       A:FF X:C0 Y:01 F:7F S:1FE [.V-BDIZC]
1CF0  68        PLA           A:FF X:C0 Y:01 F:FD S:1FF [NV-BDI.C]
1CF1  29 02     AND #$02      A:02 X:C0 Y:01 F:7D S:1FF [.V-BDI.C]
1CF3  C5 0C     CMP $0C       A:02 X:C0 Y:01 F:7D S:1FF [.V-BDI.C]
1CF5  D0 FE     BNE $FE       A:02 X:C0 Y:01 F:7D S:1FF [.V-BDI.C]
1CF5  D0 FE     BNE $FE       A:02 X:C0 Y:01 F:7D S:1FF [.V-BDI.C]
1CF5  D0 FE     BNE $FE       A:02 X:C0 Y:01 F:7D S:1FF [.V-BDI.C]
LIV2 commented 7 years ago

Nevermind, Spotted that TRB was not functioning correctly, Z should not have been set by the TRB and the 0x000B should have been set to 0x00.

My emulator was decoding the wrong addressing mode for this instruction.