Open i509VCB opened 1 month ago
The previously linked datasheet is for a 600-series PCH. The Intel N100 Datasheet lists the pinstrap as follows
The previously linked datasheet is for a 600-series PCH. The Intel N100 Datasheet lists the pinstrap as follows
Yes I forgot to update the original image for the pin strap. Shouldn't change the question still.
I would like to use the TCP0 and TCP1 as Type-C with alt-mode. Diagram of what I am trying to do:![image](https://github.com/user-attachments/assets/0e1ab27b-6029-440f-bf33-aed31ddb13d4)
From what I can tell, these will require a PD controller. The full carrier board schematic uses a![image](https://github.com/user-attachments/assets/7628c1fd-9a82-4d23-932e-7ac2236dd127)
IT8851
:However I am unable to acquire an IT8851. I will use an MCU and control power delivery from that.
From what I can tell in the N100 datasheet, 26.1.1 states the following:
26.2 (yes wrong image, see comments below for right one)![image](https://github.com/user-attachments/assets/da6f6c5f-7d6d-488f-826a-a45a106888e7)
This matches with what I see in the schematic for pins 3, 4 and 5. The datasheet also mentions a second I2C port (I2C2 on the module), something with retimers.
Although beyond what the datasheet states, there is nothing describing what messages get sent to and from the PD controller.
Regarding the I2C/Smbus interface, is this defined by the SoC or defined by the BIOS? Is LattePanda able to describe the interface to configure the USB-C port mode and muxing in TCP0 and TCP1 over smbus (what messages, layout of each message)? How many I2C interfaces do I need to use for this (1 or 2)?
I tried to see if coreboot had anything to reference on this. I could not find anything.