search

LiamSkirrow / verilogtree

Print out the modular hierarchy of a Verilog design
MIT License
0 stars 0 forks source link

Fix discrepancy when running with or without debug flag #42

Closed LiamSkirrow closed 1 year ago

LiamSkirrow commented 1 year ago

Annoying discrepancy between running verilogtree with and without --debug flag.

To reproduce, vary the following command's --debug flag

./verilogtree -f ../../verilog-projects/riscv-cpu/src/alu/alu.v ../../verilog-projects/riscv-cpu/src/control-unit/Control_Unit.v --debug

The cause of this appears to be in deriveHierarchyTree.cc towards the bottom of the file, cause by running the following line:

std::cout << "    Num Children:        " << pNodeMap[parentNodeVecPtr->at(i).getChildNodeAtIndex(j)->getModuleName()].getChildNodesSize() << std::endl;
LiamSkirrow commented 1 year ago

I've decided that this is actually useful to have. The intended behaviour when running without --debug should be to produce an error message. But when trying to diagnose the issue with --super-debug it'd probably be useful to just have all output printed, rather than a cryptic error message.

Marking as closed as a result of this thought.