LiamSkirrow / verilogtree

Print out the modular hierarchy of a Verilog design
MIT License
0 stars 0 forks source link

ignore comments #46

Open LiamSkirrow opened 1 year ago

LiamSkirrow commented 1 year ago

There have been some cases where in a comment, the correct syntax is given for a module instantiation:

For example, the following code will be erroneously picked up as a module instantiation:

/*
fragment offset (0)
*/

In this case verilogtree will think there is a module named 'fragment' with instance name 'offset'. Need to ignore anything wrapped in comments -> /* ... */ and // blah

LiamSkirrow commented 1 year ago

The regex strings I use to identify module declarations and module instantiations assume that following the beginning of a newline (^) there is only whitespace before the declaration/instantiation. Therefore, my code already ignores any single-line comment (//).

This ticket only has to watch out for the multi-line comment /* */ over multiple lines.

LiamSkirrow commented 11 months ago

Nested comments are a bit of a pain to have to deal with, for example:

/* comment
/* another comment

*/
*/

Maybe in the interest of keeping this simple I will just skip multi line comments for now, and just cop it. We ignore single line comments as-is so this is probably good enough for now...

Will move this to the v0.2.0 release instead

LiamSkirrow commented 11 months ago

Moved back to v0.1.0 since after running verilogtree against some real-world verilog (https://github.com/alexforencich/verilog-i2c) it turns that false-positives are actually very common and need to be dealt with by ignoring multiline comments.