Open frankrichter opened 6 years ago
No, if you use the 15 cell version, you also have to split the C10 connection. And you can't use any spare pins in this case either.
We are currently working on a pull request which adresses this issue by replacing the cells connector with a 20 pin model.
Am So., 20. Jan. 2019, 05:12 hat SolarDude notifications@github.com geschrieben:
frankrichter Nice catch!
So does your workaround as pictured also prevent this issue on Cell 10 & 11?
I want to make the changes on my board so the cell voltage is as accurate as possible.
The BQ76940 EVM is only using 16 cell input pins so are you saying that this issue voltage drop during balancing issue may be happening on the EVM module also? Or maybe not as noticeable because the EVM board is not setup with resistors to balance at 150mA which would cause a less of a voltage drop?
I think maybe the smaller traces running to the balancing resistors & circuit could also be adding to the voltage drop during balancing. You can see how wide the traces are that run to the balancing resistors on their EVM boards.
It seems like if we want to keep the board small and not increase the width of the traces running from the 18 or a new 20 pin connector to the balancing resistors then running a extra voltage sense wire to VC5B & VC10B pins would provide the most accurate cell voltage readings and balancing performance.
Took me awhile to wrap my head around what your workaround but now I understand what is going on.
I'm going to make these changes today. I've imported the Eagle project to KiCad 5.0.2-1 and that went well except for most of the Global Labels were just text so I have to change all those to proper Global Labels and the part text indicators needed moved around so they were not directly under some parts.
I'm adding the bq78350 chip to the mix the same as the EVM modules and I'm using the Particle Photon Wifi MCU since I'm used to using that module.
Do you see any reason this 48v board would not be usable with either the BQ76920, BQ76930, or BQ76940 AFE chips? It would be nice for one board to be able to handle 4, 8, 15 cell LiFePo4 battery Packs.
Very nice that you are transferring the board to KiCad. We could open a separate branch of the Particle Photon version or open a new repository, if you like.
Unfortunately, the bq76920 has a different pin pitch than the other two, so this this board currently supports only the 30 and 40 chips. I'm using it with the bq76930 and 8 cells. The TI top 10 design considerations document makes a suggestion for board layout to support all 3 chip types. But it doesn't allow any traces below the chip anymore.
It seems like if we want to keep the board small and not increase the width of the traces running from the 18 or a new 20 pin connector to the balancing resistors then running a extra voltage sense wire to VC5B & VC10B pins would provide the most accurate cell voltage readings and balancing performance.
Yes, even with wider traces the measurements will still be affected by the voltage drop caused by the connector and the wire between BMS and cell. Separate sense wires will do the trick regardless of the resistance and the applied balancing current. That's why I went for this solution.
It seems like if we want to keep the board small and not increase the width of the traces running from the 18 or a new 20 pin connector to the balancing resistors then running a extra voltage sense wire to VC5B & VC10B pins would provide the most accurate cell voltage readings and balancing performance.
Yes, even with wider traces the measurements will still be affected by the voltage drop caused by the connector and the wire between BMS and cell. Separate sense wires will do the trick regardless of the resistance and the applied balancing current. That's why I went for this solution.
Makes sense.
The 20 pin connector can be added pretty easily without needing to move the current temp sensor port.
The new last 2 pins on the left of cell port just need to be connected to VC5B & VC10B to fix the issue.
I need to change all these global labels on the KiCad conversion before I can properly draw new wires to the new pins but the change is really easy. I'll report back once I get this done.
The new last 2 pins on the left of cell port just need to be connected to VC5B & VC10B to fix the issue.
Don't connect the new pins to VC5B and VC10B directly, this won't give the desired effect.
You have to remove the connection between R40 and R41 and connect the left side of R41 with an additional wire to cell 5 (positive). Same for R46/R47.
Very nice that you are transferring the board to KiCad. We could open a separate branch of the Particle Photon version or open a new repository, if you like.
Unfortunately, the bq76920 has a different pin pitch than the other two, so this this board currently supports only the 30 and 40 chips. I'm using it with the bq76930 and 8 cells. The TI top 10 design considerations document makes a suggestion for board layout to support all 3 chip types. But it doesn't allow any traces below the chip anymore.
I just read that document some more about the differences between the chips and it does look like it's not a good idea to try to make the board work with all 3 AFE chips due to the differences between the 4 cell and higher cell count designs.
The new last 2 pins on the left of cell port just need to be connected to VC5B & VC10B to fix the issue.
Don't connect the new pins to VC5B and VC10B directly, this won't give the desired effect.
You have to remove the connection between R40 and R41 and connect the left side of R41 with an additional wire to cell 5 (positive). Same for R46/R47.
Your talking about cutting where you see the Blue X marks and adding where you see the bright RED lines?
Then connect the new C5+ & C10+ connections to where you see the White C5+ and C10+ text right?
Your cuts are ok, your new connections aren't. You have to connect C5/C10 to the lower pad of R40/46, not to the upper pad. Please refer to the photo in my first post. There is no connection between the enameled copper wire and the trace below.
Your cuts are ok, your new connections aren't. You have to connect C5/C10 to the lower pad of R40/46, not to the upper pad. Please refer to the photo in my first post. There is no connection between the enameled copper wire and the trace below.
Got it!
We need the cell to feed through the resistors before going into the AFE pins.
So we need the new connections that are shown by the new dark blue lines going from C5 & C10 right?
Yes, this is how we modded our board. Since then it is working flawlessly.
Additionnally it would make sense to connect the C5 and C10 vias to C5/C10 and not to the newly created C5+/C10+ like in your image, otherwise it won't work if you connect only 10 cells and leave out the C10+ connection which is not necessary for 10 cells.
The schematic should look like this: LibreSolar_BMS48V_20190121.pdf
Yes, this is how we modded our board. Since then it is working flawlessly.
Additionnally it would make sense to connect the C5 and C10 vias to C5/C10 and not to the newly created C5+/C10+ like in your image, otherwise it won't work if you connect only 10 cells and leave out the C10+ connection which is not necessary for 10 cells.
Great, makes sense to connect to the Vias as you did in your mod.
I think I know exactly what is going on now and can properly make the changes.
What is your battery pack setup? How much current? Which Sense board are you using?
Great, makes sense to connect to the Vias as you did in your mod.
In the mod the via is connected to C5+/C10+ like in your image. In a new layout this should be avoided.
What is your battery pack setup?
9 of these cells: https://www.lithiumakkushop.de/product/innopower-lfmp-60ah/
How much current?
about 30A
Which Sense board are you using?
Yes, this is how we modded our board. Since then it is working flawlessly. Additionnally it would make sense to connect the C5 and C10 vias to C5/C10 and not to the newly created C5+/C10+ like in your image, otherwise it won't work if you connect only 10 cells and leave out the C10+ connection which is not necessary for 10 cells.
So just so we are clear.
You are saying the new C5+ and C10+ should connect at the vias that the orange arrows are pointing to? If not what is recommended?
Great, makes sense to connect to the Vias as you did in your mod.
In the mod the via is connected to C5+/C10+ like in your image. In a new layout this should be avoided.
What is your battery pack setup?
9 of these cells: https://www.lithiumakkushop.de/product/innopower-lfmp-60ah/
How much current?
about 30A
Which Sense board are you using?
What kind of heat does the sense board produce at 30 amps?
How much current testing have you done with the board? Just curious what is possible.
I have one on order with 2oz copper on both sides of the board.
You are saying the new C5+ and C10+ should connect at the vias that the orange arrows are pointing to?
Nope, this is how it should not be done...
If not what is recommended?
Connect them to the right, so they can stay on the respective C5/C10 rail.
What kind of heat does the sense board produce at 30 amps?
No measurements, but no problems so far.
How much current testing have you done with the board?
No current testing done so far, but the board is rated with 80A. Perhaps you need a heatsink at full load. But be carefull when not all MOSFETs are switched on, the voltage drop at the body diode will produce a lot more heat.
It's late now in Central Europe, let's talk tomorrow.
If not what is recommended?
Connect them to the right, so they can stay on the respective C5/C10 rail.
I'm not sure why but I'm totally confused
Can you post a picture showing where the new C5+ and C10+ lines should connect to on the PCB board picture I posted?
I want to make sure it's right.
I will do a quick drawing in the evening, but it's not as complicated as you think ;-)
I think I got the new 20 Pin connector added and the wiring modified to prevent the cell voltage offset issue from happening. Take a look at the schematic and let me know if you see anything wrong.
I made sure I copied the new schematic you posted so we are on the same page as far as the C5 & C10 connections.
Looks good!
Very nice that you are transferring the board to KiCad. We could open a separate branch of the Particle Photon version or open a new repository, if you like.
Just wondering whether the KiCad version ever made it into a repo?
I would also like to re-build the BMS and curious if there any updates. @SolarDude Could share your the KiCad version? Thx a lot.
The cell voltage measurements of cell 5 and 6 (also cell 10 and 11 with bq76940) are influenced by the balancing current of the adjacent cell in the other cell group. The voltage deviation depends on the resistance between BMS and cell, in my case it was about 15-20mV. With this error the BMS can't achieve an accurate balancing. This happens because the clocks of the 2 or 3 cell groups are not synchronized.
From "bq769x0 Family Top 10 Design Considerations" (SLUA749A) chapter 4 p. 9:
Working solution/workaround: Remove the connections between VC5/VC5B and VC10/VC10B on the board and connect them to the respective cell with separate wires. Therefore the cells connector should be changed to a 20 pin model. With 10s version it is possible to use one of the spare pins C11-C15 (see attached photos of my hacked board):
![bms-hack_bottom](https://user-images.githubusercontent.com/13228024/41469844-13277352-70af-11e8-8069-06a45b6468f1.jpg)