Closed ArashIranfar closed 5 years ago
martinjaeger
commented
5 years ago It's the goal of that MOSFET to dissipate power. And it gets more the more power you consume from the internal 3V3 LDO. Did not see any issues in my design so far.
Please check the datasheet to see how much supply current the internal LDO can handle.
Can't read your schematic file format...
ArashIranfar
commented
5 years ago Thanks. The problem as you mentioned was with the power consumption of the board. My MCU clock was set to the highest possible value (42Mhz) and it needed 36mA. The problem is solved thanks.
P.S.: The schematic file was an Altium schematics and apparently you use Eagle ... I attached the PDF of the schematics in case you would like to check it... Schematics-BQ76940.pdf
Hi, I am trying to design a BMS board based on what Texas Instruments have published as the evaluation board and what you have designed as a practical example. The problem I have is with the part you called "Source follower for decreased voltage drop in internal LDO (100V N-MOS)". The FET is getting really hot! The VC5X port of the chip is pulling the Gate up to 9 volts but the Source is somehow already at 8 volts so the Vgs is more or less 1 V and I think this is the problem because it increases the Rdson which can result in more power dissipation in the FET. I've seen some designs with a 200 Ohm resistor connected between the Source and the capacitor which may solve my issue as well but I think this may result in more power dissipation in the bq76940 itself which can't be good but that's a solution none the less. Also, I only have a STM32F103VET6 and some 10K pull-up resistors on the board and the internal LDO is supplying 3.1 V with 37 mA right now. Is this too much?! I've attached the schematic file to my board if you could kindly check it.
Thank you.
EmbededSystem.zip