Closed Gerriko closed 5 years ago
After acknowledgement (A) by NTAG I 2 C, the bus master/host issues a MASK byte that defines exactly which bits shall be modified by a 1b bit value at the corresponding bit position
The 0xFF is a mask byte. It defines which of the 8bits in mirrorBaseBlockNr are relevant. The SRAM_MIRROR_BLOCK register is 8bits wide, so all the bits of mirrorBaseBlockNr must be written to the register. If the mask was 0xF8, then the lowest three bits of SRAM_MIRROR_BLOCK would not be updated. Suppose SRAM_MIRROR_BLOCK is 0x9 and we do : writeRegister(SRAM_MIRROR_BLOCK, 0xF8, 0xF8) then the value in the SRAM_MIRROR_BLOCK register would be 0xF9 after the write. That's undesired behavior.
Aha, thanks for the explanation.
I've purchased an NT3H2111 tag and just reviewing your library.
I am looking at bool Ntag::setSramMirrorRf(bool bEnable, byte mirrorBaseBlockNr) function.
This may be a stupid question, but I just wanted to test my understanding of your code and find out why you are using 0xFF in "writeRegister(SRAM_MIRROR_BLOCK,0xFF,mirrorBaseBlockNr)" and not 0xF8
The trigger for this question was that when running the Arduino example ntagTest, the return values within testSramMirror() functionn in the code "tag.readSram(0,readeeprom,16) " all show 0. Was not sure if that is the correct output.
Thanks