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Lightelligence / rules_verilog

Bazel build rules for compiling Verilog
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Implement lint rule waiver abstraction #25

Open ciglass opened 2 years ago

ciglass commented 2 years ago

Switching lint tool vendors is time consuming, in part because all of the inline RTL waivers use tool-specific rule names and those names must be updated to the new tool's names. This can be time consuming and causes RTL churn.

It would be nice if the rules_verilog lint waiver system had a level of abstraction in rule names. Instead of having users waive tool-specific rules by name, they would waive abstract names that convey common lint issues (e.g. operator bit width mismatch). Each of the rules_verilog lint parsers would know how to map from the tool-specific name to the rules_verilog name.

@wstucker suggested this in #23 .

ciglass commented 2 years ago

One other advantage to this system is that it would decrease the overhead of running multiple tools in parallel. An RTL team could run both Ascent and HAL in the same repo without having to duplicate all rule waivers.