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Lightelligence / rules_verilog

Bazel build rules for compiling Verilog
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Fhan/compile pldm sa #56

Open FuqiangHan opened 1 year ago

FuqiangHan commented 1 year ago

Feature for generating the palladium sa mode file list.

FuqiangHan commented 1 year ago

@FuqiangHan, the purpose of this PR is to create a unique compile template for Palladium SA. But so far, it looks like the Palladium SA template and compile flow look identical to that of Palladium ICE. So why do we need separate templates/flows for these platforms? Remember that from each of these compile templates, we render one flist when we bazel build. All but one of those flists are wasted for every build.

@jmlemay99 Totally understand where you are coming from. I thought about it. You know, why I put a separate template there is because I anticipate that there probably be some differences there. So far, I just successfully compile ICE mode example and SA mode MCP, this merge just is a milestone as begin reference point. Next step, we are going to compile the system SA mode, which might have some changes there, then go to the ICE system which is probably different from SA mode. Anyway, let‘s just put them there, I will keep it in mind, and will merge them together eventually if there is no big difference. For now, it would be a better/friendly way to update the script/flow in the upcoming process, thanks!