mikel-armbb
commented
1 year ago Hi,
Looking at the data in the ID_DATA[0x20] lines I can see that the ID itself matches the ETMTRACEIDR value you have set, it also appears that there are Branch packets [0x4b] and P headers [0x90] indicating instruction execution. The first byte in the first block could be an ISYNC packet [0x08] However what I am not seeing is and ASYNC packet (lsb first = 0x00 0x00 0x00 0x00 0x00 0x80) which must be present for the decoder to correctly synchronize with the incoming byte stream. I would expect to see FSYNC 0xFF 0xFF 0xFF 0x7f packets between frames and HSYNC 0xFF 0x7f inside packets for an TPIU running in continuous mode which it must for a SWO output. These may be being automatically stripped by your trace capture hardware, as sometimes happens.
As far as I can tell there is no issue with OpenCSD here (presumably that;s what you meant - rather the OpenOCD which is a different debug product). You need to establish why your hardware is not emitting ASYNC packets in the ETM stream.
Regards
Mike
On Sat, 11 Mar 2023 at 16:16, Stefan Achatz @.***> wrote:
I have a STM32F411 (Cortex-M4) from which I want to gather ETM information with a logic analyzer and I can't get decoding to work.
At the moment I output NRZ encoded data on the single SWO pin. As stated in the "CoreSight Architecture Specification v3.0" a data byte is output lsb first with a start(0) and stop(1) bit. Here is the bitstream of the first 10 16-byte frames formatted in 10bits:
1111111111 1111111111 1111111111 1111111111 1111111111 1111111111 1111111111 1111111111 0100000101 0000100001 0000001101 0100101011 0010000001 0000000001 0000100001 0000110011 0001111001 0001100011 0011011001 0001010111 0000010011 0111100101 0000100011 0011011001 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0111111111 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0000000001 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0111111111 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0000000001 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0111111111 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0000000001 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0111111111 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0110100101 0000010011 0000000001 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0000010011 0010100101 0111111111
This output shows a long run of 1s until data is sent from the device which should consist mostly of doing a busy loop. So far this looks legit, but there's no frame synchronization packet to be seen.
Here is a shortened excerpt of my OpenOCD configuration:
DecodeTree *pDecodeTree = DecodeTree::CreateDecodeTree( OCSD_TRC_SRC_FRAME_FORMATTED, OCSD_DFRMTR_PACKED_RAW_OUT | OCSD_DFRMTR_UNPACKED_RAW_OUT | OCSD_DFRMTR_FRAME_MEM_ALIGN );
ocsd_etmv3_cfg config; config.reg_idr = 0x4114F250; // ETMIDR 0xE00411E4 config.reg_ctrl = 0x00000190; // ETMCR 0xE0041000 config.reg_ccer = 0x18541800; // ETMCCER 0xE00411E8 config.reg_trc_id = 0x00000020; // ETMTRACEIDR 0xE0041200 config.arch_ver = ARCH_V7; config.core_prof = profile_CortexM; EtmV3Config configObj(&config);
pDecodeTree->createDecoder( OCSD_BUILTIN_DCD_ETMV3, OCSD_CREATE_FLG_FULL_DECODER, &configObj );
pDecodeTree->createMemAccMapper(); pDecodeTree->addBinFileMemAcc(0x08000000, OCSD_MEM_SPACE_ANY, "Firmware.bin"); pDecodeTree->addGenElemPrinter(&genElemPrinter); pDecodeTree->addRawFramePrinter(&framePrinter, OCSD_DFRMTR_PACKED_RAW_OUT | OCSD_DFRMTR_UNPACKED_RAW_OUT); DecodeTreeElement pElement = pDecodeTree->getFirstElement(elemID);while (pElement) { ItemPrinter pPrinter; ocsd_err_t err = pDecodeTree->addPacketPrinter(elemID, true, &pPrinter); pElement = pDecodeTree->getNextElement(elemID); }
When I feed the extracted bytes of above bitstream into OpenCSD, this is the output with all printers active:
Frame Data; Index 0; RAW_PACKED; 41 08 60 a9 02 00 08 98 3c 8c 36 d4 90 4f 88 36 Frame Data; Index 0; ID_DATA[0x20]; 08 61 a9 03 00 08 98 3d 8c 37 d4 90 4f 88 Idx:0; ID:20; [0x08 0x61 0xa9 0x03 ]; NOTSYNC : Trace Stream not synchronised Idx:0; ID:20; OCSD_GEN_TRC_ELEM_NO_SYNC( [init-decoder]) Idx:4; ID:20; [0x00 0x08 0x98 0x3d 0x8c 0x37 0xd4 0x90 0x4f 0x88 ]; NOTSYNC : Trace Stream not synchronised Frame Data; Index 16; RAW_PACKED; 4a 90 4a 90 4a 90 4a 90 4a 90 4a 90 4a 90 4a ff Frame Data; Index 16; ID_DATA[0x20]; 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b Idx:16; ID:20; [0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b ]; NOTSYNC : Trace Stream not synchronised Frame Data; Index 32; RAW_PACKED; 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 00 Frame Data; Index 32; ID_DATA[0x20]; 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 Idx:32; ID:20; [0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 ]; NOTSYNC : Trace Stream not synchronised Frame Data; Index 48; RAW_PACKED; 4a 90 4a 90 4a 90 4a 90 4a 90 4a 90 4a 90 4a ff Frame Data; Index 48; ID_DATA[0x20]; 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b Idx:48; ID:20; [0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b ]; NOTSYNC : Trace Stream not synchronised Frame Data; Index 64; RAW_PACKED; 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 00 Frame Data; Index 64; ID_DATA[0x20]; 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 Idx:64; ID:20; [0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 ]; NOTSYNC : Trace Stream not synchronised Frame Data; Index 80; RAW_PACKED; 4a 90 4a 90 4a 90 4a 90 4a 90 4a 90 4a 90 4a ff Frame Data; Index 80; ID_DATA[0x20]; 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b Idx:80; ID:20; [0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b ]; NOTSYNC : Trace Stream not synchronised Frame Data; Index 96; RAW_PACKED; 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 00 Frame Data; Index 96; ID_DATA[0x20]; 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 Idx:96; ID:20; [0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 ]; NOTSYNC : Trace Stream not synchronised Frame Data; Index 112; RAW_PACKED; 4a 90 4a 90 4a 90 4a 90 4a 90 4a 90 4a 90 4a ff Frame Data; Index 112; ID_DATA[0x20]; 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b Idx:112; ID:20; [0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b ]; NOTSYNC : Trace Stream not synchronised Frame Data; Index 128; RAW_PACKED; 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 00 Frame Data; Index 128; ID_DATA[0x20]; 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 Idx:128; ID:20; [0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 ]; NOTSYNC : Trace Stream not synchronised Frame Data; Index 144; RAW_PACKED; 4a 90 4a 90 4a 90 4a 90 4a 90 4a 90 4a 90 4a ff Frame Data; Index 144; ID_DATA[0x20]; 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b 90 4b Idx:144; ID:20; [0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b 0x90 0x4b ]; NOTSYNC : Trace Stream not synchronised Idx:144; ID:20; OCSD_GEN_TRC_ELEM_EO_TRACE( [end-of-trace]) ID:20 END OF TRACE DATA
As I can see no frame synchronization packets I used OCSD_DFRMTR_FRAME_MEM_ALIGN instead of OCSD_DFRMTR_HAS_FSYNCS. Even with manually inserting 4 sync bytes and changing the configuration I could not get a meaningful output. What does OpenOCD need to synchronise?
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erazor-de
I have a STM32F411 (Cortex-M4) from which I want to gather ETM information with a logic analyzer and I can't get decoding to work.
At the moment I output NRZ encoded data on the single SWO pin. As stated in the "CoreSight Architecture Specification v3.0" a data byte is output lsb first with a start(0) and stop(1) bit. Here is the bitstream of the first 10 16-byte frames formatted in 10bits:
This output shows a long run of 1s until data is sent from the device which should consist mostly of doing a busy loop. So far this looks legit to me, but there's no frame synchronization packet to be seen.
Here is a shortened excerpt of my OpenCSD configuration:
When I feed the extracted bytes of above bitstream into OpenCSD, this is the output with all printers active:
As I can see no frame synchronization packets I used
OCSD_DFRMTR_FRAME_MEM_ALIGNinstead ofOCSD_DFRMTR_HAS_FSYNCS. Even with manually inserting 4 sync bytes and changing the configuration I could not get a meaningful output. What does OpenCSD need to synchronise?