Lora-net / SWSD003

LR11xx chip (LR1110 / LR1120 / LR1121) and SX126x chip (SX1261 / SX1262 / SX1268) SDK
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[LR1121] SF6 compatibility with SX127x in implicit mode #345

Closed JyeSmith closed 3 months ago

JyeSmith commented 11 months ago

From the datasheet it is possible to make the LR1121 SF6 compatible with the SX1276 in implicit mode. So far I have not been successful receiving packets correctly. The transceiver will trigger the rxdone IRQ, but the packet does not pass a software CRC.

1.Set bit 18 of register at address 0xf20414 to 1

Is there any further documentation on what mode the LR1121 must be in before setting the register e.g. STBY, FS, RX mode? Should the register also be set after writing the SetModulationParams for SF6?

Below is the data I am sending with opcode LR11XX_REGMEM_WRITE_REGMEM32_MASK_OC (0x010C). Does this look correct?

wrbuf[0] = 0x00; // MSB
wrbuf[1] = 0xf2;
wrbuf[2] = 0x04;
wrbuf[3] = 0x14;
// Mask
wrbuf[4] = 0x00; // MSB
wrbuf[5] = 0b00000100;
wrbuf[6] = 0x00;
wrbuf[7] = 0x00; 
// Data
wrbuf[8] = 0x00; // MSB
wrbuf[9] = 0b00000100;
wrbuf[10] = 0x00;
wrbuf[11] = 0x00;

Cheers Jye