Open LudwigCRON opened 4 years ago
Verilog and system Verilog files are read and parsed such that one can used information of the those modules in a mako file to generate bloc.
.cir, .scs, *.sp bloc model could also be read and parsed
Verilog and system Verilog files are read and parsed such that one can used information of the those modules in a mako file to generate bloc.
.cir, .scs, *.sp bloc model could also be read and parsed