High-quality high-speed random number generator (neoTRNG)

[gardners]

Is your feature request related to a problem? Please describe. The MEGA65 currently lacks a high-speed good-quality hardware random number generator. Having one would make a lot of software easier to write, for example to simulate the behaviour of various productivity software.

Describe the solution you'd like A free IO register should return a fresh random value whenever read.

Describe alternatives you've considered Doing nothing. Always a noble option.

Additional context None

[gardners]

Use neoTRNG

[lydon42]

Currently reevaluating with the help of MJoergen:

I've successfully built a bitstream, and looking at the synthesis report. Among other things, I notice the following:

WARNING: [Vivado 12-663] port, pin or net 'cpu0i_10/trng0/i_1/i_6' not found. [/home/mfj/git/PRIVATE/MEGA65/mega65-core/src/vhdl/mega65r3.xdc:457]
CRITICAL WARNING: [Vivado 12-4739] set_disable_timing:No valid object(s) found for '-objects cpu0i_10/trng0/i_1/i_6'. [/home/mfj/git/PRIVATE/MEGA65/mega65-core/src/vhdl/mega65r3.xdc:457]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
WARNING: [Vivado 12-663] port, pin or net 'cpu0i_10/trng0/i_1/i_6' not found. [/home/mfj/git/PRIVATE/MEGA65/mega65-core/src/vhdl/mega65r3.xdc:458]
CRITICAL WARNING: [Vivado 12-4739] set_disable_timing:No valid object(s) found for '-objects cpu0i_10/trng0/i_1/i_6'. [/home/mfj/git/PRIVATE/MEGA65/mega65-core/src/vhdl/mega65r3.xdc:458]
Resolution: Check if the specified object(s) exists in the current design. If it does, ensure that the correct design hierarchy was specified for the object. If you are working with clocks, make sure create_clock was used to create the clock object before it is referenced.
CRITICAL WARNING: [Common 17-165] Too many positional options when parsing 'Z', please type 'set_disable_timing -help' for usage info. [/home/mfj/git/PRIVATE/MEGA65/mega65-core/src/vhdl/mega65r3.xdc:459]
CRITICAL WARNING: [Common 17-165] Too many positional options when parsing 'Z', please type 'set_disable_timing -help' for usage info. [/home/mfj/git/PRIVATE/MEGA65/mega65-core/src/vhdl/mega65r3.xdc:460]

So, something is wrong with the constraints. I'm not sure, what they should be instead, or if they even are necessary any more. At the moment, Vivado complains about those lines, and will then probably just ignore them.

[lydon42]

Problem is the toggle of trng_consume_toggle happening in function read_data_complex: you can not change signals within functions. Workaround using write to RNG register for toggelung results in random bytes read. Trying different method of toggling on read outside of the function next.

[lydon42]

last change does make neoTRNG functional.

[lydon42]

Testing the RNG

It seems that the RNG takes a lot of cycles to produce a new number. The picture shows the number changing every 16-22 bytes. The loop takes 16 cycles, which translates to 256 to 352 cycles for a new number. This means to me that we need access to the valid bit of neoTRNG so that software can determine if the RNG already has a new number.

Possible location for TRNGVALID bit

There is space in the high bits of $D7FE, so we could add it there as the high bit, as putting it into bit 7 or 6 would allow for easy testing using BIT.