MEGA65 / mega65-core

MEGA65 FPGA core
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Introduce new C65 bug compatibility flag #685

Closed ki-bo closed 1 year ago

ki-bo commented 1 year ago

Is your feature request related to a problem? Please describe. The VIC-IV currently models a bug of the VIC-III where in H640 mode the character generator is shifted two physical pixels to the left (leading to the first character of each line partly hidden by the left border). Commodore worked around this bug in the ROM code of the C65 prototypes. When switching to H640 mode, the XSCL register in $D016 is used to move the text one logical pixel (=2 physical pixels) to the right. When switching to H320 mode, the XSCL register is reset back to 0, since the bug did not appear in that mode.

Since the MEGA65 is designed to run existing Commodore ROMs in a compatible way, the mentioned bug is also intentionally modelled in the VIC-IV implementation. While the ROMs are working as expected that way, developers of new software expressed it would be good to be able to disable this bug specifically, as it would require them to also work around it in their own implementations.

Describe the solution you'd like The proposed solution is to have a bug compatibility mode in the VIC-IV which allows to enable and disable the mentioned VIC-III bug. Since the C65 ROMs and also current MEGA65 ROMs still contain the $D016 XSCL workaround, the system should always start with C65 bug compatibility mode enabled. Software should be able to disable it by setting bit 5 of $D07A. Clearing bit 5 of $D07A will re-enable the bug again.

Describe alternatives you've considered Alternatives would have been to either leave the bug modelled as is, but then developers would need to work around it. Not modelling the bug on the other hand introduces compatibility problems with existing software assuming the VIC-III behaviour (including existing C65 and MEGA65 ROMs).