HWRNG!RAND D7EF and HWRNG!NOTRDY D7FE.7 provide direct access to an FPGA random number generator that takes a few cycles after a number is accessed before the next number is ready. For high-speed applications, waiting for the not-ready flag to clear consumes an unknown number of cycles. In these cases, it would help for this to be a hardware queue of several random numbers generated by this component, so such a program doesn't have to wait between numbers when pulling several values.
The registers don't change: RAND is the top of the queue, and NOTRDY is high if the queue is empty. If the queue is not full, it populates itself automatically from the RNG until it is, careful to wait on the RNG's own not-ready flag between numbers.
A queue size of five would allow for fast pulling of 32-bit random numbers, such as once per frame.
(I'm curious if there is any advantage to the program to flush the queue before use, such as to add entropy to when the queue is populated for the first time.)
HWRNG!RAND D7EF and HWRNG!NOTRDY D7FE.7 provide direct access to an FPGA random number generator that takes a few cycles after a number is accessed before the next number is ready. For high-speed applications, waiting for the not-ready flag to clear consumes an unknown number of cycles. In these cases, it would help for this to be a hardware queue of several random numbers generated by this component, so such a program doesn't have to wait between numbers when pulling several values.
The registers don't change: RAND is the top of the queue, and NOTRDY is high if the queue is empty. If the queue is not full, it populates itself automatically from the RNG until it is, careful to wait on the RNG's own not-ready flag between numbers.
A queue size of five would allow for fast pulling of 32-bit random numbers, such as once per frame.
(I'm curious if there is any advantage to the program to flush the queue before use, such as to add entropy to when the queue is populated for the first time.)