Closed dpfeuffer closed 1 year ago
Hi @dpfeuffer
I think I have fixed it, please, check the output of the fpga_load:
men@men-MEN-F026L00:/opt/menlinux/TOOLS/FPGA_LOAD$ sudo ./fpga_load 0x1172 0x000a 0x4d45 0 -t -v
Z100_PCIInit
Update device:
Nr.|bus|dev|fun| BAR0 | BAR1 | BAR2 | BAR3 | BAR4 | BAR5
0 14 14 0 0000d001 0000e101 0000e001 91601000 00000000 00000000
BARs of FPGA PCI device 14:14.0:
BAR0: 0x0000d001; size: 0x00000000, mapType: IO;
BAR1: 0x0000e101; size: 0x00000000, mapType: IO;
BAR2: 0x0000e001; size: 0x00000000, mapType: IO;
BAR3: 0x91601000; size: 0x00000000, mapType: MEM;
BAR4: 0x00000000; size: 0x00000000, mapType: unused;
BAR5: 0x00000000; size: 0x00000000, mapType: unused;
Information about the Chameleon FPGA:
FPGA File=' $ ' table model=0xffffffab('�') Revision 205.0 Magic 0xABCD
List of the Chameleon units:
Idx DevId Module Grp Inst Var Rev IRQ BAR Offset Address
--- ------ ------------------------ --- ---- --- --- --- --- ---------- ----------
0 0x0036 16Z054_SYSTEM 0 0 0 6 0 0 0x00000000 0xd001
1 0x003b 16Z059_IRQ 0 0 0 0 1 0 0x00000100 0xd101
2 0x0031 16Z049_TMR 0 0 0 0 2 0 0x00000200 0xd201
3 0x0033 16Z051_DAC 0 0 0 0 3 0 0x00000300 0xd301
4 0x003b 16Z059_IRQ 0 1 0 0 4 0 0x00000400 0xd401
5 0xffff not identified 0 0 0 0 8 0 0x00000500 0xd501
6 0x0032 16Z050_BIO 0 0 0 0 5 1 0x00000000 0xe101
7 0x0032 16Z050_BIO 0 1 0 0 6 2 0x00000000 0xe001
8 0x002d 16Z045_FLASH 0 0 0 1 7 3 0x00000000 0x91601000
The IP Core number 7 is not detected because the modCode is not defined. Do you know which kind of IP Core it it?
I'm doing some tests and I think they will take this afternoon and tomorrow, but it looks good ;)
It looks good!
The IP Core number 7 is not detected because the modCode is not defined. Do you know which kind of IP Core it it?
Don't know if I understand your question correctly. IP core 7 is listed:
7 0x0032 16Z050_BIO 0 1 0 0 6 2 0x00000000 0xe001
Or do you mean scan_system.sh is not able to detect it? Z50 is a GPIO device: https://github.com/MEN-Mikro-Elektronik/13Z050-06
My bad Dieter,
I wanted to say, IP Core number 5, that appears with "?" or "not identified"
According to the F401 Spec, the IP core 5 is a debouncer:
This debouncer is reported with DevId 0xffff, because 0x3E DeviceID is unknown in chameleon.h.
The chameleon debugs should look like (see above for the full dump):
[ 5269.792301] 05 ? 0x003e 0 0x00 0x08 0 0x0500 0x000000005a50d34d
But anyway, there is no MDIS driver for this debouncer. It is used to debounce the inputs of the 16Z050_BIO. The debouncer is configurable but it seems to me that it was never supported from a driver and only default values are used for debouncing. The modCode 0x3E is not official defined in our FPGA IP Core Overview document, so just let this IP core undefined.
Hi Dieter,
Ok, so I will leave such IP core as "undefined". Then, we have to update the scan_system script in order to avoid such kind of lines, otherwise the script will fail.
Thank you so much.
Hi @dpfeuffer
After the rework, the patches are ready. Now, the Chameleon table is dumped with correct values, even for the table version and revision
men@men-MEN-F026L00:/opt/menlinux/TOOLS/FPGA_LOAD$ sudo ./fpga_load 0x1172 0x000a 0x4d45 0 -t -v
Z100_PCIInit
Update device:
Nr.|bus|dev|fun| BAR0 | BAR1 | BAR2 | BAR3 | BAR4 | BAR5
0 14 14 0 0000d001 0000e101 0000e001 91601000 00000000 00000000
BARs of FPGA PCI device 14:14.0:
BAR0: 0x0000d000; size: 0x00000000, mapType: IO;
BAR1: 0x0000e100; size: 0x00000000, mapType: IO;
BAR2: 0x0000e000; size: 0x00000000, mapType: IO;
BAR3: 0x91601000; size: 0x00000000, mapType: MEM;
BAR4: 0x00000000; size: 0x00000000, mapType: unused;
BAR5: 0x00000000; size: 0x00000000, mapType: unused;
Information about the Chameleon FPGA:
FPGA File=' $ ' table model=0x41('A') Revision 5.0 Magic 0xABCD
List of the Chameleon units:
Idx DevId Module Grp Inst Var Rev IRQ BAR Offset Address
--- ------ ------------------------ --- ---- --- --- --- --- ---------- ----------
0 0x0036 16Z054_SYSTEM 0 0 0 6 0 0 0x00000000 0xd000
1 0x003b 16Z059_IRQ 0 0 0 0 1 0 0x00000100 0xd100
2 0x0031 16Z049_TMR 0 0 0 0 2 0 0x00000200 0xd200
3 0x0033 16Z051_DAC 0 0 0 0 3 0 0x00000300 0xd300
4 0x003b 16Z059_IRQ 0 1 0 0 4 0 0x00000400 0xd400
5 0xffff not identified 0 0 0 0 8 0 0x00000500 0xd500
6 0x0032 16Z050_BIO 0 0 0 0 5 1 0x00000000 0xe100
7 0x0032 16Z050_BIO 0 1 0 0 6 2 0x00000000 0xe000
8 0x002d 16Z045_FLASH 0 0 0 1 7 3 0x00000000 0x91601000
All work for this have been merged into mad-dev branch.
The fpga_load tool should support to dump FPGA chameleon tables located at io mapped BAR. With the F401 board (which I want to send to Spain), I was not able to read out the chameleon table.
HW: F23P CPU, F401
Linux: PRETTY_NAME="CentOS Linux 8 (Core)" Linux centos 4.18.0-80.11.2.el8_0.x86_64 #1 SMP Tue Sep 24 11:32:19 UTC 2019 x86_64 x86_64 x86_64 GNU/Linux
I would assume to read out the chameleon table with one of these possibilities:
A)
B)
I was able to dump the chameleon table with the help of the chameleon driver, so the chameleon table is present and can be read out with the chameleon library. Here is my MDIS configuration for F23P + F401 + Z51_DAC: f401.tar.gz
Chameleon table dumped with the chameleon BBIS: