MabezDev / idf2svd

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Interrupt information #5

Closed MabezDev closed 4 years ago

MabezDev commented 4 years ago

https://github.com/MabezDev/idf2svd/pull/3 added the regexes to parse the interrupt information, but how should we go about linking that information with each peripheral?

MabezDev commented 4 years ago

Is there a reliable pattern for matching interrupts with peripherals?

This is the current output of the interrupt information:

Interrupt information: [
    Interrupt {
        name: "WIFI_MAC_INTR",
        description: Some(
            "interrupt of WiFi MAC, level",
        ),
        value: 0,
    },
    Interrupt {
        name: "WIFI_MAC_NMI",
        description: Some(
            "interrupt of WiFi MAC, NMI, use if MAC have bug to fix in NMI",
        ),
        value: 1,
    },
    Interrupt {
        name: "WIFI_BB_INTR",
        description: Some(
            "interrupt of WiFi BB, level, we can do some calibartion",
        ),
        value: 2,
    },
    Interrupt {
        name: "BT_MAC_INTR",
        description: Some(
            "will be cancelled",
        ),
        value: 3,
    },
    Interrupt {
        name: "BT_BB_INTR",
        description: Some(
            "interrupt of BT BB, level",
        ),
        value: 4,
    },
    Interrupt {
        name: "BT_BB_NMI",
        description: Some(
            "interrupt of BT BB, NMI, use if BB have bug to fix in NMI",
        ),
        value: 5,
    },
    Interrupt {
        name: "RWBT_INTR",
        description: Some(
            "interrupt of RWBT, level",
        ),
        value: 6,
    },
    Interrupt {
        name: "RWBLE_INTR",
        description: Some(
            "interrupt of RWBLE, level",
        ),
        value: 7,
    },
    Interrupt {
        name: "RWBT_NMI",
        description: Some(
            "interrupt of RWBT, NMI, use if RWBT have bug to fix in NMI",
        ),
        value: 8,
    },
    Interrupt {
        name: "RWBLE_NMI",
        description: Some(
            "interrupt of RWBLE, NMI, use if RWBT have bug to fix in NMI",
        ),
        value: 9,
    },
    Interrupt {
        name: "SLC0_INTR",
        description: Some(
            "interrupt of SLC0, level",
        ),
        value: 10,
    },
    Interrupt {
        name: "SLC1_INTR",
        description: Some(
            "interrupt of SLC1, level",
        ),
        value: 11,
    },
    Interrupt {
        name: "UHCI0_INTR",
        description: Some(
            "interrupt of UHCI0, level",
        ),
        value: 12,
    },
    Interrupt {
        name: "UHCI1_INTR",
        description: Some(
            "interrupt of UHCI1, level",
        ),
        value: 13,
    },
    Interrupt {
        name: "TG0_T0_LEVEL_INTR",
        description: Some(
            "interrupt of TIMER_GROUP0, TIMER0, level, we would like use EDGE for timer if permission",
        ),
        value: 14,
    },
    Interrupt {
        name: "TG0_T1_LEVEL_INTR",
        description: Some(
            "interrupt of TIMER_GROUP0, TIMER1, level, we would like use EDGE for timer if permission",
        ),
        value: 15,
    },
    Interrupt {
        name: "TG0_WDT_LEVEL_INTR",
        description: Some(
            "interrupt of TIMER_GROUP0, WATCHDOG, level",
        ),
        value: 16,
    },
    Interrupt {
        name: "TG0_LACT_LEVEL_INTR",
        description: Some(
            "interrupt of TIMER_GROUP0, LACT, level",
        ),
        value: 17,
    },
    Interrupt {
        name: "TG1_T0_LEVEL_INTR",
        description: Some(
            "interrupt of TIMER_GROUP1, TIMER0, level, we would like use EDGE for timer if permission",
        ),
        value: 18,
    },
    Interrupt {
        name: "TG1_T1_LEVEL_INTR",
        description: Some(
            "interrupt of TIMER_GROUP1, TIMER1, level, we would like use EDGE for timer if permission",
        ),
        value: 19,
    },
    Interrupt {
        name: "TG1_WDT_LEVEL_INTR",
        description: Some(
            "interrupt of TIMER_GROUP1, WATCHDOG, level",
        ),
        value: 20,
    },
    Interrupt {
        name: "TG1_LACT_LEVEL_INTR",
        description: Some(
            "interrupt of TIMER_GROUP1, LACT, level",
        ),
        value: 21,
    },
    Interrupt {
        name: "GPIO_INTR",
        description: Some(
            "interrupt of GPIO, level",
        ),
        value: 22,
    },
    Interrupt {
        name: "GPIO_NMI",
        description: Some(
            "interrupt of GPIO, NMI",
        ),
        value: 23,
    },
    Interrupt {
        name: "FROM_CPU_INTR0",
        description: Some(
            "interrupt0 generated from a CPU, level",
        ),
        value: 24,
    },
    Interrupt {
        name: "FROM_CPU_INTR1",
        description: Some(
            "interrupt1 generated from a CPU, level",
        ),
        value: 25,
    },
    Interrupt {
        name: "FROM_CPU_INTR2",
        description: Some(
            "interrupt2 generated from a CPU, level",
        ),
        value: 26,
    },
    Interrupt {
        name: "FROM_CPU_INTR3",
        description: Some(
            "interrupt3 generated from a CPU, level",
        ),
        value: 27,
    },
    Interrupt {
        name: "SPI0_INTR",
        description: Some(
            "interrupt of SPI0, level, SPI0 is for Cache Access, do not use this",
        ),
        value: 28,
    },
    Interrupt {
        name: "SPI1_INTR",
        description: Some(
            "interrupt of SPI1, level, SPI1 is for flash read/write, do not use this",
        ),
        value: 29,
    },
    Interrupt {
        name: "SPI2_INTR",
        description: Some(
            "interrupt of SPI2, level",
        ),
        value: 30,
    },
    Interrupt {
        name: "SPI3_INTR",
        description: Some(
            "interrupt of SPI3, level",
        ),
        value: 31,
    },
    Interrupt {
        name: "I2S0_INTR",
        description: Some(
            "interrupt of I2S0, level",
        ),
        value: 32,
    },
    Interrupt {
        name: "I2S1_INTR",
        description: Some(
            "interrupt of I2S1, level",
        ),
        value: 33,
    },
    Interrupt {
        name: "UART0_INTR",
        description: Some(
            "interrupt of UART0, level",
        ),
        value: 34,
    },
    Interrupt {
        name: "UART1_INTR",
        description: Some(
            "interrupt of UART1, level",
        ),
        value: 35,
    },
    Interrupt {
        name: "UART2_INTR",
        description: Some(
            "interrupt of UART2, level",
        ),
        value: 36,
    },
    Interrupt {
        name: "SDIO_HOST_INTR",
        description: Some(
            "interrupt of SD/SDIO/MMC HOST, level",
        ),
        value: 37,
    },
    Interrupt {
        name: "ETH_MAC_INTR",
        description: Some(
            "interrupt of ethernet mac, level",
        ),
        value: 38,
    },
    Interrupt {
        name: "PWM0_INTR",
        description: Some(
            "interrupt of PWM0, level, Reserved",
        ),
        value: 39,
    },
    Interrupt {
        name: "PWM1_INTR",
        description: Some(
            "interrupt of PWM1, level, Reserved",
        ),
        value: 40,
    },
    Interrupt {
        name: "PWM2_INTR",
        description: Some(
            "interrupt of PWM2, level",
        ),
        value: 41,
    },
    Interrupt {
        name: "PWM3_INTR",
        description: Some(
            "interruot of PWM3, level",
        ),
        value: 42,
    },
    Interrupt {
        name: "LEDC_INTR",
        description: Some(
            "interrupt of LED PWM, level",
        ),
        value: 43,
    },
    Interrupt {
        name: "EFUSE_INTR",
        description: Some(
            "interrupt of efuse, level, not likely to use",
        ),
        value: 44,
    },
    Interrupt {
        name: "CAN_INTR",
        description: Some(
            "interrupt of can, level",
        ),
        value: 45,
    },
    Interrupt {
        name: "RTC_CORE_INTR",
        description: Some(
            "interrupt of rtc core, level, include rtc watchdog",
        ),
        value: 46,
    },
    Interrupt {
        name: "RMT_INTR",
        description: Some(
            "interrupt of remote controller, level",
        ),
        value: 47,
    },
    Interrupt {
        name: "PCNT_INTR",
        description: Some(
            "interrupt of pluse count, level",
        ),
        value: 48,
    },
    Interrupt {
        name: "I2C_EXT0_INTR",
        description: Some(
            "interrupt of I2C controller1, level",
        ),
        value: 49,
    },
    Interrupt {
        name: "I2C_EXT1_INTR",
        description: Some(
            "interrupt of I2C controller0, level",
        ),
        value: 50,
    },
    Interrupt {
        name: "RSA_INTR",
        description: Some(
            "interrupt of RSA accelerator, level",
        ),
        value: 51,
    },
    Interrupt {
        name: "SPI1_DMA_INTR",
        description: Some(
            "interrupt of SPI1 DMA, SPI1 is for flash read/write, do not use this",
        ),
        value: 52,
    },
    Interrupt {
        name: "SPI2_DMA_INTR",
        description: Some(
            "interrupt of SPI2 DMA, level",
        ),
        value: 53,
    },
    Interrupt {
        name: "SPI3_DMA_INTR",
        description: Some(
            "interrupt of SPI3 DMA, level",
        ),
        value: 54,
    },
    Interrupt {
        name: "WDT_INTR",
        description: Some(
            "will be cancelled",
        ),
        value: 55,
    },
    Interrupt {
        name: "TIMER1_INTR",
        description: Some(
            "will be cancelled",
        ),
        value: 56,
    },
    Interrupt {
        name: "TIMER2_INTR",
        description: Some(
            "will be cancelled",
        ),
        value: 57,
    },
    Interrupt {
        name: "TG0_T0_EDGE_INTR",
        description: Some(
            "interrupt of TIMER_GROUP0, TIMER0, EDGE",
        ),
        value: 58,
    },
    Interrupt {
        name: "TG0_T1_EDGE_INTR",
        description: Some(
            "interrupt of TIMER_GROUP0, TIMER1, EDGE",
        ),
        value: 59,
    },
    Interrupt {
        name: "TG0_WDT_EDGE_INTR",
        description: Some(
            "interrupt of TIMER_GROUP0, WATCH DOG, EDGE",
        ),
        value: 60,
    },
    Interrupt {
        name: "TG0_LACT_EDGE_INTR",
        description: Some(
            "interrupt of TIMER_GROUP0, LACT, EDGE",
        ),
        value: 61,
    },
    Interrupt {
        name: "TG1_T0_EDGE_INTR",
        description: Some(
            "interrupt of TIMER_GROUP1, TIMER0, EDGE",
        ),
        value: 62,
    },
    Interrupt {
        name: "TG1_T1_EDGE_INTR",
        description: Some(
            "interrupt of TIMER_GROUP1, TIMER1, EDGE",
        ),
        value: 63,
    },
    Interrupt {
        name: "TG1_WDT_EDGE_INTR",
        description: Some(
            "interrupt of TIMER_GROUP1, WATCHDOG, EDGE",
        ),
        value: 64,
    },
    Interrupt {
        name: "TG1_LACT_EDGE_INTR",
        description: Some(
            "interrupt of TIMER_GROUP0, LACT, EDGE",
        ),
        value: 65,
    },
    Interrupt {
        name: "MMU_IA_INTR",
        description: Some(
            "interrupt of MMU Invalid Access, LEVEL",
        ),
        value: 66,
    },
    Interrupt {
        name: "MPU_IA_INTR",
        description: Some(
            "interrupt of MPU Invalid Access, LEVEL",
        ),
        value: 67,
    },
    Interrupt {
        name: "CACHE_IA_INTR",
        description: Some(
            "interrupt of Cache Invalied Access, LEVEL",
        ),
        value: 68,
    },
]