Multiple SPI buses?

[kitlaan]

(Do you want to turn on Discussions, to not clutter up Issues?)

Disclaimer: I'm brand new to this equipment, so take this with a dish of salt...

I was reading some of the posts about your design, and noticed your statement about pegging a single core. Since you have two MCP3008 chips (on the same SPI, and select between the two), this means you sample each round-robin.

Since Raspberry Pis have (at least) two SPI buses, have you thought about putting each MCP3008 on an independent bus, and thus read them simultaneously with two threads?

And then extrapolating from there, could you piggyback two PCBs to a single RasPi (and thus get 16x2 CTs hooked up, at your currently designed sampling rate)?

Alternatively, it looks like the RasPi4 has even more SPI buses (looks like 4 are feasible), so you could possibly read four MCP3008s simultaneously (at the cost of maxing out all the pi's cores...).

[MarkBryanMilligan]

Yeah, I'll turn on discussions after this kickstarter is finished. Multithreading and increasing the sample rate is definitely something I've considered. The accuracy is so good with what I'm doing now I didn't feel like adding complexity to improve it further. I'd be more interested in adding complexity if it meant being able to add more MCP3008s. How would you wire up 4 chips to one pi?

[kitlaan]

Here's my theory...

Use SPI0 + 2 CS as you have currently (pins 19/21/23/24/26). Use SPI1 + 2 CS for a second board (pins 38/35/40/12/11/36). I imagine running two threads concurrently each running its own SPI could get you the current accuracy, but now with double the number of CTs (semaphores notwithstanding).

Assuming that even works, I wonder if you can split the AC transformer to both boards...

I guess the simplest experiment (once I get boards) is rather than stacking the PCB to the pi directly, just wire them up manually, each to its own SPI.

[MarkBryanMilligan]

I need to look into how to access SPI1. I'm using wiringPi for all of this interaction and the guy who maintains that rage quit a while ago, and I'm not sure if it provides access to SPI1. Maybe there's a newer library I should be using.

If it's really possible to do that, I would just redesign the board to put it all in one, and then I only need to use one port for the voltage, and 31 for current. That would be pretty amazing. Even a pi zero 2 w has plenty of cpu room to double the ports.

[kitlaan]

Here's what I ran across this during the googling-fest in the last hour...

• WiringPi seems to only support SPI0.
• http://abyz.me.uk/rpi/pigpio/index.html; looks like there are java bindings
• I'm curious what the performance difference is if you accessed via sysfs: https://jumpnowtek.com/rpi/Using-mcp3008-ADCs-with-Raspberry-Pis.html

[MarkBryanMilligan]

I really need to rewrite the pi code in C. It'd be so much faster and I'd have so much control over memory. I went with java so I could use the same data model on the pi, the server, and the android app. I pre-allocate all the memory for the SPI reads in java so garbage collection isn't triggered, but it'd be more deterministic in C. To really optimize I probably need to switch to C. JNI works and all, but man I hate it. Why are you throwing all of these good ideas out here on the most stressful night I can remember waiting for a kickstarter to hit its goal!?!?

[kitlaan]

Sorry; I only started digging because there's only hours left and I'm itching to poke around. 😀 I wish I had run across this project months ago...

I'd be pretty happy if you switched to C/C++ as I could help with development (as my Java's pretty much completely been paged out in the last two decades).

[MarkBryanMilligan]

Let's see how tonight goes. Regardless of whether the kickstarter succeeds or fails, I want to optimize the pi. If we could get 31 breakers on one pi, it would crush anything else out there.

[kitlaan]

Since I can't leave well enough alone (and I don't know how to turn off my brain on PTO)... I was pondering how you could have a single PCB module supply 16 plugs but allow them to be multipurpose.

Some half-baked thoughts:

• a single PCB design that allows the voltage jack to be dual duty, so you can have 15+1 or 16 CT
• ... by keeping the voltage divider circuit but changing the connection via a jumper/solderbridge
• ... by not populating the voltage divider circuit at all and solder-bridge
• keep the existing 40-pin header -- for 1xPCB usage
• ... option of stacking header and solder-bridge/cut to switch the SPI used
• ... or a 2-4 way adaptor board that routes each set of "6 SPI0 pins" to the proper raspi pins

aka, you could have a single board made (thus not needing to keep track of different SKUs) that folks can buy in the multiples they need instead of a single big board that costs a lot. (I'm handwaving that "doubling" the board components basically doubles the cost.)

Since the voltage divider circuit cost isn't huge, If you just have the board maker populate everything (instead of two runs of with and without), that keeps to one board (again, SKU management).

The 40-pin header cost adds up (annoyingly) and is a waste of pins. SPI0 uses a block of 2x4 pins, so maybe saving you the few cents there gives you the funds for stocking some adaptor boards.

As for the adaptor board... depending on how you lay out the connector pins, the case could be (raspi 4 w/ four boards = 63 breakers) 4x the width of your current one (and lots of empty standoff space), or 2x2. If for other raspis, 2x width (31 breakers).

Or I'm just overthinking this and have folks solder wires to a header and its a little messier.

Either way, making it modular also makes the configuration a LOT more complicated, but it doesn't change the complexity of the "single PCB case" (assuming you hide the modular mechanism behind a toggle/button).

[kitlaan]

And so I don't lose it in all my tabs...

• Raspi4 SPI0/1 vs SPI3/4/5/6
• Raspi4 pinout
• Raspi SPI chip select

TL;DR -- if someone wants to use Raspi4 3-4x SPI (aka 32-63 breakers) they need to use a different pinout than the Raspi3/zero2/Raspi4 1-2x SPI (1-31 breakers) configuration.

4	SPI		2	SPI
x	x		x	x
3	x		_	x
3	x		_	x
4cs	5		_	_
x	5		x	_
_	6cs		1cs	1cs
6cs	x		_	x
_	_		_	_
x	3cs		x	_
_	x		0	x
_	4cs		0	_
_	_		0	0cs
x	4		x	0cs
3cs	3		_	_
4	x		_	x
4	5cs		_	_
5	x		_	x
6	_		1	1cs
5cs	6		_	1
x	6		x	1

(where x is reserved, _ is an unused gpio, and cs marks the default CS pins)

Even without using the default CS pins, it doesn't look like the pin usage can be shuffled around enough to make things co-located.

[kitlaan]

Did some more reading on how the raspi deals with SPI.

Through the Linux Device Tree Overlay mechanism, the the GPIO+drivers are configured to deal with hardware. The defaults limit to what the hardware provides for chip selects, but they can be customized to do more.

So in theory, the PCB could be made with one of these configurations (each with their tradeoffs):

1. each SPI w/ N chip selects -- total sampling rate is divided by N (aka as you have today, N=2)
2. M SPIs with N chip selects -- total sampling rate is M/N (aka today you have, M=1, N=2)

Of course we have the hardware limitations:

• raspi type (aka 2 total SPIs vs 4 total SPIs)
• number of available GPIO pins

I'm not sure what design intent you want to go with, but it seems like a reasonable "prebuilt configuration" would be:

• 4 total ADCs using 2x SPI, providing 31 breakers
• this works across all raspis the same way
• since it's a "prebuilt configuration", occupying all the SPIs isn't a downside

Alternatively, what I described a few days back:

• modular 2 ADC board, allowing 15 or 16 breaker config (using the bypass idea)
• the "prebuilt configuration" allows 15 breakers
• someone that wants to deal with the header wiring themselves could get 2-voltage + 30-breakers (or 1-voltage + 31-breakers)
• pro: 2 PCBs should be roughly the same cost as the single 31-breaker PCB
• con: "prebuilt config" only goes to 15
• con: software UI design gets complicated, but the firmware code itself shouldn't be too bad
• pro: possibility of using raspi4 to go up to 4-voltage + 60-breakers (or 1-voltage + 63-breakers)
• pro: possibility of higher sampling rate to use the 2 SPIs in single-adc mode (1-voltage + 7+8-breakers)
• pro: possibility of higher sampling rate using raspi4 to use the 4 SPIs in single-adc mode (1-voltage + 7+8+8+8-breakers)
• pro: possibility of slower sampling rate using more chip-select pins (by manually wiring the PCBs to the same MISO/MOSI/CLK but different CS GPIOs) to provide even more breakers

References:

• 4 SPIs on Raspi4
• Custom SPI DTB to add CS pins
• Raspi doc on SPI
• mpc3008 spidev C ioctl example
• random: mpc3008 spidev python example
• random: spidev nodejs

[kitlaan]

Came up with yet another PCB design idea to allow one board to meet lots of needs. (I think this can handle the 3-phase flow?)

• PCB is laid out for 2x20 header
• ADC₀ is tied to SPI0-CS0
• ADC₁ is tied to SPI1-CS0
• Solder pads allow for a second PCB to daisy-chain SPI0+1's MISO/MOSI/CLK (solder from the pads to the 2nd PCB's header pins)
• Solder pads for SPI0-CS1 and SPI1-CS1 (solder from the pads to the 2nd PCB's CS0 pins)
• Allow solder jumper to enable/disable the voltage pin

Someone that wants to add another chip-select (CS2) would have to solder to PCB₀'s header pins (bleh), but seems feasible. (Alternatively, another solder pad to daisy-chain CS2... since SPI1 already has default support for 3 chip-selects... so there would just need to be a custom DTB to add one for SPI0.)

Alternatively, someone that wants to use a different SPI layout entirely would just not use the stacking 2x20 header and manually solder wires to the proper layout.

[MarkBryanMilligan]

I just migrated from wiringpi to pigpio. This will allow using the other SPI channels. Needed a couple changes to pi4j to get it to work, so I'll try to get those submitted next. I've never contributed to someone else's project before, so gotta go figure that out.