Martins3 / loongson-dune

:zap: Process virtualization based on KVM. More useable, stable and practical than Stanford Dune.
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debug : exception #12

Open Martins3 opened 3 years ago

Martins3 commented 3 years ago
Martins3 commented 3 years ago

What I expceted:

  1. gup failed
  2. trigger syscall

ideas:

Martins3 commented 3 years ago
 1550  sudo yum install gcc
 1551  sudo yum install devtoolset-7-gcc
 1552  source /opt/rh/devtoolset-7/enable
Martins3 commented 3 years ago
Martins3 commented 3 years ago

close:

   0x0000000120023c20 <+64>:    bnez    a1,0x120023ca8 <getcwd+200>
   0x0000000120023c24 <+68>:    move    s5,a0
->   0x0000000120023c28 <+72>:    bnez    a0,0x120024110 <getcwd+1328>
Martins3 commented 3 years ago

musl

  1. https://musl.libc.org/doc/1.1.24/manual.html
  2. https://stackoverflow.com/questions/42128091/linking-to-musl-with-other-headers-from-usr-include
    lrwxrwxrwx 1 root root   20 1月  19 22:54 asm -> ../../../include/asm
    lrwxrwxrwx 1 root root   28 1月  19 22:54 asm-generic -> ../../../include/asm-generic
    lrwxrwxrwx 1 root root   22 1月  19 22:52 linux -> ../../../include/linux

    Then, how to install musl in Loongson

    • ./configure
    • make
    • make install
Martins3 commented 3 years ago

Wow : musl works

Martins3 commented 3 years ago

PAGE_GRAIN

Martins3 commented 3 years ago
Martins3 commented 3 years ago

Arguments are passed as required by the “o32” ABI. Most of the time, that means that up to four arguments are passed in the registers a0– a3; but there are corner cases where something else happens, and it’s all explained in section 11.2.1.

Martins3 commented 3 years ago

how to cross compile the musl

  1. mipsenv
  2. ./configure
  3. make :joy:
Martins3 commented 3 years ago
Martins3 commented 3 years ago
0000000120003ef0 <__errno_location>:
   120003ef0:   7c02e83b        rdhwr   v0,$29
   120003ef4:   03e00008        jr      ra
   120003ef8:   64428f5c        daddiu  v0,v0,-28836
   120003efc:   00000000        nop
Martins3 commented 3 years ago

9.25 HWREna Register (CP0 Register 7, Select 0)

Compliance Level: Required (Release 2). The HWREna register contains a bit mask that determines which hardware registers are accessible via the RDHWR instruction when that instruction is executed in a mode in which coprocessor 0 is not enabled

image

Martins3 commented 3 years ago

image