MasterPlayer / adxl345-sv

FPGA implemented component for realize register file in FPGA resources with request and sends data to ADXL345 device
MIT License
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add support for single requests from ps to adxl devices for reading #19

Closed MasterPlayer closed 2 years ago

MasterPlayer commented 2 years ago

it allow perform interrupt processing

MasterPlayer commented 2 years ago

Action if INTR ACK - reading device 0x32..0x37 registers. new functional of single requests supports on v1.5 Time while INTR signal = 1 is 1.140 ms Time for event, when interrupt asserted and core requests the data = 7.6 us