Closed MasterPlayer closed 2 years ago
When INTR signal asserted, FSM goes to reading INT_SOURCE register in FSM notation : 1) if ADXL_INTERRUPT and irq allow is true go to TX_INT_SOURCE_PTR 2) In TX_INT_SOURCE_PTR send request for reading 0x30 register (INT_SOURCE register) : WRITE operation 0x01 (number of bytes) 0x30 (pointer to register) Go to TX_SEND_INT_SOURCE_REQ_ST 3) in TX_SEND_INT_SOURCE_REQ_ST send read request for 1 byte: 0x01 Go to RX_INT_SOURCE_AWAIT_DATA_ST 4) in RX_INT_SOURCE_AWAIT_DATA_ST : Await while new data register was updated, if data was received, refresh this register(0x30) in register device bank Go to INT_PROCESSING_ST 5) In INT_PROCESSING_ST we perform analysis (INT_SOURCE and INT_ENABLE) registers for next processing for interrupt
1) SingleTap interrupt processing perform in #22
need extend configuration register file for realize ability for answer ACK for ADXL_IRQ signal. How do this?
SingleTap : in v1.6 supported hardware
DoubleTap : in v1.7 supported hardware
Activity : in v1.8 supported
Inactivity : in v1.9 supported
DataReady : in 1.10 supported
Need add support for interrupt processing in hardware, it might be additional state in finite state machine
Algorithm: (hardware)
software :