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MathyV / lvgl_esp32_mpy

LVGL on ESP32 with MicroPython (as a USER_C_MODULE)
MIT License
8 stars 7 forks source link

Crash during a GUI initialization #4

Closed martyy665 closed 4 months ago

martyy665 commented 4 months ago

Hello, I have got the bundled example working, however, when I try to display something more complex (e.g. small .png image) I get in most cases the following error:

Rebooting...
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0xc (RTC_SW_CPU_RST),boot:0x2f (SPI_FAST_FLASH_BOOT)
Saved PC:0x40375f10
0x40375f10: esp_restart_noos at /storage/lvgl_esp32_mpy/esp-idf/components/esp_system/port/soc/esp32s3/system_internal.c:158 (discriminator 1)                                                                                                          

SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce3818,len:0x1008
load:0x403c9700,len:0x4
load:0x403c9704,len:0xb5c
load:0x403cc700,len:0x2e58
entry 0x403c989c
Start APP in one second

Guru Meditation Error: Core  0 panic'ed (Cache disabled but cached memory region accessed). 

Core  0 register dump:
PC      : 0x4209803e  PS      : 0x00060034  A0      : 0x80377bb8  A1      : 0x3fca1c20  
0x4209803e: tick at wrapper.c:?

A2      : 0x4209803c  A3      : 0x00000000  A4      : 0x00000000  A5      : 0x3fc9f5e0  
0x4209803c: tick at wrapper.c:?

A6      : 0x3fca49a4  A7      : 0x0032834e  A8      : 0x80377b53  A9      : 0x3fca1c00  
A10     : 0x00000001  A11     : 0x00000001  A12     : 0x00000000  A13     : 0xb33fffff  
A14     : 0x000007d0  A15     : 0x00060023  SAR     : 0x00000004  EXCCAUSE: 0x00000007  
EXCVADDR: 0x00000000  LBEG    : 0x00000000  LEND    : 0x00000000  LCOUNT  : 0x00000000  

Backtrace: 0x4209803b:0x3fca1c20 0x40377bb5:0x3fca1c60 0x40377e3d:0x3fca1c90 0x403774aa:0x3fca1cb0 0x403803f1:0x3fcf0e70 0x403812c5:0x3fcf0e90
0x4209803b: transfer_done_cb at wrapper.c:?
0x40377bb5: timer_alarm_handler at /storage/lvgl_esp32_mpy/esp-idf/components/esp_timer/src/esp_timer.c:497
0x40377e3d: timer_alarm_isr at /storage/lvgl_esp32_mpy/esp-idf/components/esp_timer/src/esp_timer_impl_systimer.c:93
0x403774aa: _xt_lowint1 at /storage/lvgl_esp32_mpy/esp-idf/components/freertos/FreeRTOS-Kernel/portable/xtensa/xtensa_vectors.S:1240
0x403803f1: spi_flash_op_block_func at /storage/lvgl_esp32_mpy/esp-idf/components/spi_flash/cache_utils.c:136 (discriminator 1)
0x403812c5: ipc_task at /storage/lvgl_esp32_mpy/esp-idf/components/esp_system/esp_ipc.c:83

A wrong Micropython compilation config can cause it. Can you please share (or better add to the repo) your sdkconfig files which should work?

MathyV commented 4 months ago

The esp_timer used for lv_tick_inc is configured using interrupts, so you need to enable CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD. That should be the only difference with the ESP32_GENERIC_S3 board config.

I do also set the CPU frequency to 240 MHz by including boards/sdkconfig.240mhz but that doesn't impact functionality, only refresh rate.

martyy665 commented 4 months ago

Hello @MathyV , you are right - the project cannot be compiled without this option so I have enabled it, but this is only difference between the "stock" settings. Do you have any idea what could be causing the Cache disabled but cached memory region accessed issue? Thank you!