Add CIRCT entry

[MattPD]

Thanks! I wonder if this is a good fit for the general FPGA software category. Ideally that would be suitable for all FPGA engineers (gEDA may be a good fit, for instance). Perhaps "Software: Compilers" would be a better idea? (A subsection analogous to, e.g., "ELF: Software" here: https://github.com/MattPD/cpplinks/blob/master/executables.md#elf-software).

[xgupta]

Thanks! I wonder if this is a good fit for the general FPGA software category. Ideally that would be suitable for all FPGA engineers (gEDA may be a good fit, for instance). Perhaps "Software: Compilers" would be a better idea?

Agree.

[MattPD]

One more clarification request: Would you happen to know whether the code generation for FPGA backend mentioned in the original incubator project proposal (https://lists.llvm.org/pipermail/llvm-dev/2020-July/143178.html) exists today? If so it would make sense to link here.

[xgupta]

Sorry, I don't know "code generation for FPGA" possible. It does emit FIRRTL(fir file) using FIRRTL dialect which can be run by FIRRTL compiler (https://github.com/chipsalliance/firrtl). It does emit Verilog from FIRTL, RTL, and SV dialect, which can be run by Verilog compiler. LLHD dialect can take SV/VHDL file and also emit LLVM IR (and simulate it using llhd-sim) which may be use to target FPGA architecture?

My experience with them is only a few days old. I may be wrong. You can look at this image to know how its dialects interact. Final decision is yours if it makes sense to add it here :)

[MattPD]

OK, I think it's better to wait until there's a documented FPGA support to add this to FPGA resources (feel free to reopen then); thanks!