By reading the Libera Single Pass (Platform A) Tango device server code, it can be seen that position, sum and current are calculated from the (raw) ADC buffer, at a desired interval (2 seconds by default).
Our instrument already provides the X and Y(Z) position, SUM value using calculations inside the FPGA - let call this SPE data. The X,Y(Z), SUM data is delivered to the client application (Tango device server) in similar manner as ADC data is, but SPE data period is inherently dictated by the hardware trigger signal (~5 - 50 Hz, depending on the facility). I could see a possible issue with the data rate arrival (rate > 5Hz higher), than what your currently period of 2 seconds is set for Tango device server.
Let me get to the point:
Is there some special reason that the position is calculated from the raw ADC data, instead of using unit provided X,Y,SUM data?
OTOH, apart from the few more CPU clock cycles used to calculate the transform buffer value, current and sum, we do not have any objections in doing things the way they are done at the moment.
Also if you want to keep the LiberaSinglePassE Tango device server code as similar as possible to the existing code you might want to stick with the current solution.
By reading the Libera Single Pass (Platform A) Tango device server code, it can be seen that position, sum and current are calculated from the (raw) ADC buffer, at a desired interval (2 seconds by default).
Our instrument already provides the X and Y(Z) position, SUM value using calculations inside the FPGA - let call this SPE data. The X,Y(Z), SUM data is delivered to the client application (Tango device server) in similar manner as ADC data is, but SPE data period is inherently dictated by the hardware trigger signal (~5 - 50 Hz, depending on the facility). I could see a possible issue with the data rate arrival (rate > 5Hz higher), than what your currently period of 2 seconds is set for Tango device server.
Let me get to the point: Is there some special reason that the position is calculated from the raw ADC data, instead of using unit provided X,Y,SUM data?
OTOH, apart from the few more CPU clock cycles used to calculate the transform buffer value, current and sum, we do not have any objections in doing things the way they are done at the moment.
Also if you want to keep the LiberaSinglePassE Tango device server code as similar as possible to the existing code you might want to stick with the current solution.