Here are two minor improvements to the overclock driver that was merged a few days ago.
I noticed that very rarely - once in a few hundred thousand transitions - large clock jumps (from 400 MHz directly to 1200 MHz) might crash the system. Now I put the main PLL into bypass when transitioning clock multipliers. This makes transitions a bit slower, but more stable. The change is good for > 24 hours and 3 million clock transitions on my MiSTer.
Now we get the frequency of OSC1 from the device tree. This has no functional difference but it's a bit cleaner than hard coding it.
Here are two minor improvements to the overclock driver that was merged a few days ago.