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MiSTer-devel / MSX_MiSTer

MSX for MiSTer
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VDP register 9 bit 4 screen issues #25

Open Vampier opened 3 years ago

Vampier commented 3 years ago

when giving the command vdp(10)=&b0001000 in basic the MSX core currently goes bonkers. It's supposed to be a special screen mode used in demos and programs like 'm' (manager program for files) better known as the super impose/interlace bit

It prevents demos like 'unknown reality' to display correctly. I will try to find out if the same issue exists on a so called OMC (one chip MSX which is also FPGA based and this core is derived from)

Edit:12/22/2020 Activating scandoubler fixes the problem - but that does not help people who can only do 15khz.

ducasp commented 5 months ago

Hi @Vampier , have you tried opening a ticket on KdL github repository? Since OCM is the basis for this core, there is a chance that it could be fixed there and then in the next revision of OCM being fixed

KdL repository is: https://github.com/gnogni/ocm-pld-dev