Revision list
dmb: ier bit 7 should read back as '1'
Regarding the mos6522 datasheet this is not correct:
In addition to setting and clearing IER bits, the processor can read the contents of this register by placing the proper address on the register select and chip select inputs with the R/W line high. Bit 7 will read as a logic 0.
In m6522 the changelog reads:
Revision list dmb: ier bit 7 should read back as '1'
Regarding the mos6522 datasheet this is not correct:
In addition to setting and clearing IER bits, the processor can read the contents of this register by placing the proper address on the register select and chip select inputs with the R/W line high. Bit 7 will read as a logic 0.