Closed gtaylormb closed 3 months ago
You cannot change any file in sys folder, sorry. This is part of framework which must be the same across all MiSTer cores. I recommend to add clock enable which will run at 14.318MHz, then you can use any clock with polynomial CE. By the way, what is the problem with current clock rate? It differs about 0.5% from original. It's even within XTal generator tolerance.
Gotcha, too bad. Yeah the existing clock will be fine, just thought I'd get it even closer for the OPL3 purists.
I still suggest to add clock enable for master clock of OPL3. This will improve stability further as it will allow to use the same clock as other modules and will minimize clock crossing instabilities.
Use the audio PLL instead to generate the OPL3 clock, which gets us much closer to the original sample rate, without the use of an additional PLL to maintain clock stability.