MichaIng / DietPi

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Odroid C4 does not boot from certain U3 SD cards #5782

Open Power-onoff opened 1 year ago

Power-onoff commented 1 year ago

Creating a bug report/issue

Required Information

Additional Information (if applicable)

Steps to reproduce

  1. Download the dietpi image (DATE: Mon Aug 29 17:41:03 UTC 2022)
  2. Flash to MicroSD using "balenaEtcher-Portable-1.7.9"
  3. Install MicroSD to odriod c4
  4. Connect the HDMI terminal
  5. Connect the 12 volt power supply

Expected behaviour

  1. The kernel must be loaded and the device must operate normally

Actual behaviour

  1. The bootloader and kernel are not working and the entire device is dead

Extra details

In order to remove the existing Debian buster version and install the bullseye version, I formatted the MicroSD card and installed it using balena Etcher And turn the power to remove all connectors, except the power and hdmi odroid c 4 does not do anything and still. Odroid wiki in Ubuntu use images to operate normally by installing, using a etcher Please help me with the installation of odroid c4 dietpi

When odroid c4 is running with Ubuntu image, the blue LED is blinking MicroSD card with dietpi image does not blinking LED

MichaIng commented 1 year ago

Has the SPI flash been erased? AFAIK there is a button at the downside of the device to force booting via MMC bootloader. Can you test this?

Power-onoff commented 1 year ago

AFAIK Odroid C4 doesn't have a SPI flash

Board Layout : https://wiki.odroid.com/odroid-c4/hardware/hardware#board_layout

https://forum.odroid.com/viewtopic.php?p=297857

MichaIng commented 1 year ago

Ah, seems like only the HC4 has it. I didn't know that. Could you test the Armbian Bullseye image? Should be identical regarding bootloader and kernel: https://www.armbian.com/odroid-c4/

Power-onoff commented 1 year ago

I'll check and let you know right away

Power-onoff commented 1 year ago

Verified that there is no problem booting the Ambian Bullseye image

MichaIng commented 1 year ago

I just compared again both, they should be 100% identical regarding anything relevant for early boot stage. However, just yesterday I moved new builds in place, which contain a more recent kernel and bootloader (also newer than on Armbian image). Can you please test that one?

Do you have a USB-UART/serial adapter to review bootloader output?

Power-onoff commented 1 year ago

Yes, you have a USB-UART adapter.

I would appreciate it if you could tell me in detail what kind of test to do.

MichaIng commented 1 year ago

Just attach it when trying to boot so you see the early boot logs which should show where and why it fails.

Power-onoff commented 1 year ago

Just attach it when trying to boot so you see the early boot logs which should show where and why it fails.

more / less
``` SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:F;RCY:0;EMMC:800;NAND:81;SD?:0;SD:0;READ:0;0.0;CHK:0; bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 no sdio debug board detected L0:00000000 L1:00000703 L2:00008067 L3:15000020 S1:00000000 B2:20282000 B1:a0f83180 TE: 241406 BL2 Built : 20:29:41, Jun 18 2019. g12a ga659aac - luan.yuan@droid15-sz Board ID = 1 Set cpu clk to 24M Set clk81 to 24M Use GP1_pll as DSU clk. DSU clk: 1200 Mhz CPU clk: 1200 MHz Set clk81 to 166.6M DDR driver_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:37 board id: 1 Load FIP HDR from SD, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SD, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SD, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 255 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg DDR4 probe ddr clk to 1320MHz Load ddrfw from SD, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of Write leveling coarse delay INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SD, src: 0x00020200, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! R0_RxClkDly_Margin==106 ps 9 R0_TxDqDly_Margi==106 ps 9 R1_RxClkDly_Margin==0 ps 0 R1_TxDqDly_Margi==0 ps 0 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001 soc_vref_reg_value 0x 00000050 0000004e 0000004d 0000004e 0000004d 0000004d 0000004b 0000004e 0000004d 0000004f 0000004e 0000004e 0000004d 0000004e 00000051 0000004d 0000004d 0000004e 0000004e 0000004d 0000004d 0000004c 0000004f 0000004f 0000004e 0000004e 0000004d 0000004e 0000004e 0000004e 0000004c 0000004f dram_vref_reg_value 0x 00000020 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:43 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00700024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass non-sec scramble use zero key ddr scramble enabled 100bdlr_step_size ps== 435 result report boot times 0Enable ddr reg access Load FIP HDR from SD, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SD, src: 0x00078200, des: 0x01768000, size: 0x0009c000, part: 0 bl2z: ptr: 05129330, size: 00001e40 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12a_v1.1.3386-3b31431 2019-05-21 10:41:54 luan.yuan@droid15-sz] OPS=0x10 ring efuse init 2b 0c 10 00 01 04 24 00 00 0d 36 30 43 57 50 50 [0.017355 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:57:33, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast U-Boot 2022.07-armbian (Oct 18 2022 - 07:35:04 +0000) odroid-c4/hc4 Model: Hardkernel ODROID-C4 SoC: Amlogic Meson SM1 (S905X3) Revision 2b:c (10:2) DRAM: 3.8 GiB Core: 388 devices, 27 uclasses, devicetree: separate MMC: sd@ffe05000: 0, mmc@ffe07000: 1 Loading Environment from nowhere... OK In: serial Out: serial Err: serial Board variant: c4 Net: eth0: ethernet@ff3f0000 Hit any key to stop autoboot: 0 Card did not respond to voltage select! : -110 MMC Device 2 not found no mmc device at slot 2 starting USB... Bus usb@ff500000: Register 3000140 NbrPorts 3 Starting the controller USB XHCI 1.10 scanning bus usb@ff500000 for devices... 3 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Device 0: unknown device ethernet@ff3f0000 Waiting for PHY auto negotiation to complete......... TIMEOUT ! Could not initialize PHY ethernet@ff3f0000 missing environment variable: pxeuuid Retrieving file: pxelinux.cfg/01-00-1e-06-48-0f-ab ethernet@ff3f0000 Waiting for PHY auto negotiation to complete......... TIMEOUT ! Could not initialize PHY ethernet@ff3f0000 Retrieving file: pxelinux.cfg/00000000 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete......... TIMEOUT ! ```
MichaIng commented 1 year ago

U-Boot loads correctly but then it seems to try reading from eMMC or fails to read from SD card (from where it loaded U-Boot successfully before), not sure:

Card did not respond to voltage select! : -110
MMC Device 2 not found

Is there an eMMC module attached? If so, could you try to detach it and then boot?

Power-onoff commented 1 year ago

U-Boot loads correctly but then it seems to try reading from eMMC or fails to read from SD card (from where it loaded U-Boot successfully before), not sure:

Card did not respond to voltage select! : -110
MMC Device 2 not found

Is there an eMMC module attached? If so, could you try to detach it and then boot?

The result I mentioned is the result of the test with the eMMC module removed, that is, only the sdcard is connected

MichaIng commented 1 year ago

Hmm, currently there is no general boot issue reported with Odroid C4, but only that warn reboot does not work with latest U-Boot, an issue plaguing many of the meson64 boards with Armbian kernel. I'll check whether we can test an alternative U-Boot.

usual-user commented 1 year ago

I just attached my 2022.10 GA odroid-c4/hc4 firmware composition here. The mainline u-boot configuration seems to be derived from the n2 and also applies to the hc4.CONFIG_IDENT_STRING=" odroid-c4/hc4The TF-A components are selected according to the odroid-c4. Because I don't have a suitable device available, I can't check the functionality myself. So just run the "blank microSD card with firmware only" attempt and see what happens. u-boot-meson.zip

MichaIng commented 1 year ago

Many thanks for providing this, let's see whether it boots more reliable than the current Armbian U-Boot build. I can imagine that it's similar to the Odroid N2 boot issues with some SD card and eMMC module models.

MichaIng commented 1 year ago

Since there was a U-Boot update in the meantime, @Power-onoff could you try this image?

If it still doesn't work for you, I'll generate one with usual-user's U-Boot build provided above. This worked well for Odroid N2 already.

Power-onoff commented 1 year ago

Since there was a U-Boot update in the meantime, @Power-onoff could you try this image?

If it still doesn't work for you, I'll generate one with usual-user's U-Boot build provided above. This worked well for Odroid N2 already.

Sadly, the boot still failed.

more / less
``` SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:F;RCY:0;EMMC:800;NAND:81;SD?:0;SD:0;READ:0;0.0;CHK:0; bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 no sdio debug board detected L0:00000000 L1:00000703 L2:00008067 L3:15000020 S1:00000000 B2:20282000 B1:a0f83180 TE: 250580 BL2 Built : 20:29:41, Jun 18 2019. g12a ga659aac - luan.yuan@droid15-sz Board ID = 1 Set cpu clk to 24M Set clk81 to 24M Use GP1_pll as DSU clk. DSU clk: 1200 Mhz CPU clk: 1200 MHz Set clk81 to 166.6M DDR driver_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:37 board id: 1 Load FIP HDR from SD, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SD, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SD, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 255 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg DDR4 probe ddr clk to 1320MHz Load ddrfw from SD, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of Write leveling coarse delay INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SD, src: 0x00020200, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! R0_RxClkDly_Margin==106 ps 9 R0_TxDqDly_Margi==106 ps 9 R1_RxClkDly_Margin==0 ps 0 R1_TxDqDly_Margi==0 ps 0 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001 soc_vref_reg_value 0x 00000050 0000004e 0000004d 0000004e 0000004d 0000004d 0000004c 0000004e 0000004d 0000004f 0000004e 0000004e 0000004d 0000004e 00000051 0000004d 0000004d 0000004e 0000004e 0000004d 0000004e 0000004c 0000004f 0000004f 0000004e 0000004e 0000004d 0000004d 0000004e 0000004e 0000004c 00000050 dram_vref_reg_value 0x 00000021 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:43 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00700024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass non-sec scramble use zero key ddr scramble enabled 100bdlr_step_size ps== 435 result report boot times 0Enable ddr reg access Load FIP HDR from SD, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SD, src: 0x00078200, des: 0x01768000, size: 0x0009c000, part: 0 bl2z: ptr: 05129330, size: 00001e40 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12a_v1.1.3386-3b31431 2019-05-21 10:41:54 luan.yuan@droid15-sz] OPS=0x10 ring efuse init 2b 0c 10 00 01 04 24 00 00 0d 36 30 43 57 50 50 [0.017319 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:57:33, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast U-Boot 2022.07-armbian (Nov 30 2022 - 10:44:03 +0000) odroid-c4/hc4 Model: Hardkernel ODROID-C4 SoC: Amlogic Meson SM1 (S905X3) Revision 2b:c (10:2) DRAM: 3.8 GiB Core: 388 devices, 27 uclasses, devicetree: separate MMC: sd@ffe05000: 0, mmc@ffe07000: 1 Loading Environment from nowhere... OK In: serial Out: serial Err: serial Board variant: c4 Net: eth0: ethernet@ff3f0000 Hit any key to stop autoboot: 0 Card did not respond to voltage select! : -110 MMC Device 2 not found no mmc device at slot 2 starting USB... Bus usb@ff500000: Register 3000140 NbrPorts 3 Starting the controller USB XHCI 1.10 scanning bus usb@ff500000 for devices... 3 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Device 0: unknown device Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.5 (102 ms) *** ERROR: `serverip' not set Cannot autoload with TFTPGET missing environment variable: pxeuuid Retrieving file: pxelinux.cfg/01-00-1e-06-48-0f-ab Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A80005 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A8000 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A800 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A80 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A8 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default-arm-meson-odroid-n2 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default-arm-meson Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default-arm Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default Speed: 1000, full duplex *** ERROR: `serverip' not set Config file not found Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.5 (77 ms) *** ERROR: `serverip' not set Cannot autoload with TFTPGET Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.5 (202 ms) *** ERROR: `serverip' not set Cannot autoload with TFTPGET => => => ```
MichaIng commented 1 year ago

Actually I recognise that we flash the u-boot.bin differently, compared to Armbian. We do:

dd if=u-boot.bin of=<drive> bs=512 seek=1 conv=notrunc,fdatasync

hence flash the second stage bootloader only after the MBR. Armbian does:

dd if=u-boot.bin of=<drive> bs=1 count=442 conv=fsync
dd if=u-boot.bin of=<drive> bs=512 skip=1 seek=1 conv=fsync

hence flashes the file as well to the first stage bootloader into the MBR before the partition table. @usual-user is this correct that your U-Boot binary contains the second stage bootloader only, or is first stage U-Boot smart enough to find second stage U-Boot also 512 bytes later? Or I'm interpreting something wrong?

However, PR up and image builds running:

MichaIng commented 1 year ago

New images are ready: https://dietpi.com/downloads/images/testing/

Power-onoff commented 1 year ago

New images are ready: https://dietpi.com/downloads/images/testing/

I flashed it using balenaEtcher But it still failed to boot Did I make a mistake or miss anything?

DietPi_OdroidC4-ARMv8-Bullseye.img

more / less
``` SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:F;RCY:0;EMMC:800;NAND:81;SD?:0;SD:0;READ:0;0.0;CHK:0; bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 no sdio debug board detected L0:00000000 L1:00000703 L2:00008067 L3:15000020 S1:00000000 B2:20282000 B1:a0f83180 TE: 256758 BL2 Built : 20:29:41, Jun 18 2019. g12a ga659aac - luan.yuan@droid15-sz Board ID = 1 Set cpu clk to 24M Set clk81 to 24M Use GP1_pll as DSU clk. DSU clk: 1200 Mhz CPU clk: 1200 MHz Set clk81 to 166.6M DDR driver_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:37 board id: 1 Load FIP HDR from SD, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SD, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SD, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 255 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg DDR4 probe ddr clk to 1320MHz Load ddrfw from SD, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of Write leveling coarse delay INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SD, src: 0x00020200, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! R0_RxClkDly_Margin==118 ps 10 R0_TxDqDly_Margi==106 ps 9 R1_RxClkDly_Margin==0 ps 0 R1_TxDqDly_Margi==0 ps 0 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001 soc_vref_reg_value 0x 00000050 0000004e 0000004d 0000004e 0000004e 0000004d 0000004c 0000004e 0000004d 0000004f 0000004d 0000004e 0000004d 0000004e 00000051 0000004d 0000004d 0000004e 0000004f 0000004e 0000004e 0000004d 0000004f 0000004f 0000004f 0000004e 0000004e 0000004e 0000004f 0000004f 0000004d 00000050 dram_vref_reg_value 0x 00000020 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:43 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00700024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass non-sec scramble use zero key ddr scramble enabled 100bdlr_step_size ps== 435 result report boot times 0Enable ddr reg access Load FIP HDR from SD, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SD, src: 0x00078200, des: 0x01768000, size: 0x0009c000, part: 0 bl2z: ptr: 05129330, size: 00001e40 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12a_v1.1.3386-3b31431 2019-05-21 10:41:54 luan.yuan@droid15-sz] OPS=0x10 ring efuse init 2b 0c 10 00 01 04 24 00 00 0d 36 30 43 57 50 50 [0.017354 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:57:33, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast U-Boot 2022.10 (Nov 13 2022 - 00:00:00 +0000) odroid-c4/hc4 Model: Hardkernel ODROID-C4 SoC: Amlogic Meson SM1 (S905X3) Revision 2b:c (10:2) DRAM: 3.8 GiB Core: 387 devices, 27 uclasses, devicetree: separate MMC: sd@ffe05000: 0, mmc@ffe07000: 1 Loading Environment from nowhere... OK In: serial Out: serial Err: serial Board variant: c4 Net: eth0: ethernet@ff3f0000 starting USB... Bus usb@ff500000: Register 3000140 NbrPorts 3 Starting the controller USB XHCI 1.10 scanning bus usb@ff500000 for devices... 3 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0 Card did not respond to voltage select! : -110 MMC Device 2 not found no mmc device at slot 2 Device 0: unknown device Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.5 (73 ms) *** ERROR: `serverip' not set Cannot autoload with TFTPGET missing environment variable: pxeuuid Retrieving file: pxelinux.cfg/01-00-1e-06-48-0f-ab Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A80005 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A8000 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A800 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A80 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A8 Speed: 1000, full duplex *** ERROR: `serverip' not set ```

DietPi_OdroidC4-ARMv8-Bookworm.img

more / less
``` SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:F;RCY:0;EMMC:800;NAND:81;SD?:0;SD:0;READ:0;0.0;CHK:0; bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 no sdio debug board detected L0:00000000 L1:00000703 L2:00008067 L3:15000020 S1:00000000 B2:20282000 B1:a0f83180 TE: 254185 BL2 Built : 20:29:41, Jun 18 2019. g12a ga659aac - luan.yuan@droid15-sz Board ID = 1 Set cpu clk to 24M Set clk81 to 24M Use GP1_pll as DSU clk. DSU clk: 1200 Mhz CPU clk: 1200 MHz Set clk81 to 166.6M DDR driver_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:37 board id: 1 Load FIP HDR from SD, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SD, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SD, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 255 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg DDR4 probe ddr clk to 1320MHz Load ddrfw from SD, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of Write leveling coarse delay INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SD, src: 0x00020200, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! R0_RxClkDly_Margin==106 ps 9 R0_TxDqDly_Margi==106 ps 9 R1_RxClkDly_Margin==0 ps 0 R1_TxDqDly_Margi==0 ps 0 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001 soc_vref_reg_value 0x 0000004f 0000004e 0000004d 0000004e 0000004d 0000004d 0000004c 0000004d 0000004d 0000004f 0000004d 0000004d 0000004d 0000004e 00000051 0000004d 0000004d 0000004e 0000004f 0000004e 0000004e 0000004d 0000004f 0000004f 0000004e 0000004f 0000004e 0000004e 0000004e 0000004e 0000004d 00000050 dram_vref_reg_value 0x 00000020 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:43 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00700024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass non-sec scramble use zero key ddr scramble enabled 100bdlr_step_size ps== 440 result report boot times 0Enable ddr reg access Load FIP HDR from SD, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SD, src: 0x00078200, des: 0x01768000, size: 0x0009c000, part: 0 bl2z: ptr: 05129330, size: 00001e40 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12a_v1.1.3386-3b31431 2019-05-21 10:41:54 luan.yuan@droid15-sz] OPS=0x10 ring efuse init 2b 0c 10 00 01 04 24 00 00 0d 36 30 43 57 50 50 [0.017310 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:57:33, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast U-Boot 2022.10 (Nov 13 2022 - 00:00:00 +0000) odroid-c4/hc4 Model: Hardkernel ODROID-C4 SoC: Amlogic Meson SM1 (S905X3) Revision 2b:c (10:2) DRAM: 3.8 GiB Core: 387 devices, 27 uclasses, devicetree: separate MMC: sd@ffe05000: 0, mmc@ffe07000: 1 Loading Environment from nowhere... OK In: serial Out: serial Err: serial Board variant: c4 Net: eth0: ethernet@ff3f0000 starting USB... Bus usb@ff500000: Register 3000140 NbrPorts 3 Starting the controller USB XHCI 1.10 scanning bus usb@ff500000 for devices... 3 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0 Card did not respond to voltage select! : -110 MMC Device 2 not found no mmc device at slot 2 Device 0: unknown device Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.5 (82 ms) *** ERROR: `serverip' not set Cannot autoload with TFTPGET missing environment variable: pxeuuid Retrieving file: pxelinux.cfg/01-00-1e-06-48-0f-ab Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A80005 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A8000 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A800 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A80 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A8 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default-arm-meson-odroid-n2 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default-arm-meson Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default-arm Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default Speed: 1000, full duplex *** ERROR: `serverip' not set Config file not found Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.5 (81 ms) *** ERROR: `serverip' not set Cannot autoload with TFTPGET Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.5 (189 ms) *** ERROR: `serverip' not set Cannot autoload with TFTPGET => ```
MichaIng commented 1 year ago

Btw, no need to test the Bookworm image, if the Bullseye image does not boot. They share the exact same bootloader and kernel 😉.

Is it right that you have 3 USB devices attached? If so, does it make a difference when you detach all USB devices (apart from the UART adapter)?

Let's wait for @usual-user, whether the bootloader was flashed correctly, or whether first stage bootloader needs to be flashed. However, second stage is reached, based on output, I'd say.

Power-onoff commented 1 year ago

Is it right that you have 3 USB devices attached? If so, does it make a difference when you detach all USB devices (apart from the UART adapter)?

All tests were conducted with only power, LAN, UART, and SDcard connected I didn't connect any USB

usual-user commented 1 year ago

First of all, thank you very much for confirming that my firmware composition works. I am pleased that it works right away because after all I built the firmware only according to theoretical assumptions and on-target with a completely different tool-chain. And can't even verify the result myself. The logs indicate that everything is working as expected.

Let's wait for @usual-user, whether the bootloader was flashed correctly, or whether first stage bootloader needs to be flashed. However, second stage is reached, based on output, I'd say.

The firmware consists of several components than just the payload (u-boot). U-boot (BL33) is only the last component in the boot chain. The other boot artifacts (BL2, BL3X) are only available by Amlogic as binary-only. Therefore, all FIPs consist of the same TF-A components, which is also recognizable by the identical log messages up to the u-boot version message. Regarding the way the firmware is brought into place, I can only say that my firmware composition (FIP) only provides what the MASKROM code of the SOC requires and is placed at the entry point that the MASKROM code uses. But because now the TF-A artifacts are identical, and thus also their functionality, I can not say which code Armbian places in the MBR. However, it is not something that the MASKROM code of the SOC, TF-A or u-boot requires. Probably a legacy code artifact. But now to the real issue:

Card did not respond to voltage select! : -110

From the specification reference from the second post by @Power-onoff, I see:

Storage<----->1x Micro SD slot (DS/HS mode up to UHS-I SDR104)

From the initial post by @Power-onoff, I see:

Axxen microSDHC SK10 16GB TLC CLASS10 UHS-3

Here is my analysis: I don't know if there is a hardware limitation for the maximum UHS-I class or if only the necessary software support is missing, but the error message reflects exactly the facts. The fact that the firmware can be loaded from the card is due to the fact that the MASKROM uses the lowest common mode to use the greatest possible compatibility. Subsequent firmware may then try to use higher modes, which may not work. I would therefore recommend trying a maximum UHS-I class microSD card.

Power-onoff commented 1 year ago

Thank you for all your assistance

Here is my analysis: I don't know if there is a hardware limitation for the maximum UHS-I class or if only the necessary software support is missing, but the error message reflects exactly the facts. The fact that the firmware can be loaded from the card is due to the fact that the MASKROM uses the lowest common mode to use the greatest possible compatibility. Subsequent firmware may then try to use higher modes, which may not work. I would therefore recommend trying a maximum UHS-I class microSD card.

As you mentioned, we tested on the UHS-I class microSD card and confirmed that the login screen appears after booting.

more / less
``` SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:F;RCY:0;EMMC:800;NAND:81;SD?:0;SD:0;READ:0;0.0;CHK:0; bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 no sdio debug board detected L0:00000000 L1:00000703 L2:00008067 L3:15000020 S1:00000000 B2:20282000 B1:a0f83180 TE: 348529 BL2 Built : 20:29:41, Jun 18 2019. g12a ga659aac - luan.yuan@droid15-sz Board ID = 1 Set cpu clk to 24M Set clk81 to 24M Use GP1_pll as DSU clk. DSU clk: 1200 Mhz CPU clk: 1200 MHz Set clk81 to 166.6M DDR driver_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:37 board id: 1 Load FIP HDR from SD, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SD, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SD, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 255 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg DDR4 probe ddr clk to 1320MHz Load ddrfw from SD, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of Write leveling coarse delay INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SD, src: 0x00020200, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! R0_RxClkDly_Margin==106 ps 9 R0_TxDqDly_Margi==106 ps 9 R1_RxClkDly_Margin==0 ps 0 R1_TxDqDly_Margi==0 ps 0 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001 soc_vref_reg_value 0x 0000004f 0000004e 0000004d 0000004e 0000004d 0000004d 0000004b 0000004d 0000004d 0000004e 0000004d 0000004d 0000004d 0000004e 00000050 0000004d 0000004d 0000004e 0000004f 0000004e 0000004e 0000004d 0000004f 0000004f 0000004e 0000004e 0000004e 0000004e 0000004f 0000004f 0000004d 00000050 dram_vref_reg_value 0x 00000020 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:43 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00700024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass non-sec scramble use zero key ddr scramble enabled 100bdlr_step_size ps== 430 result report boot times 0Enable ddr reg access Load FIP HDR from SD, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SD, src: 0x00078200, des: 0x01768000, size: 0x0009c000, part: 0 bl2z: ptr: 05129330, size: 00001e40 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12a_v1.1.3386-3b31431 2019-05-21 10:41:54 luan.yuan@droid15-sz] OPS=0x10 ring efuse init 2b 0c 10 00 01 04 24 00 00 0d 36 30 43 57 50 50 [0.017319 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:57:33, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast U-Boot 2022.10 (Nov 13 2022 - 00:00:00 +0000) odroid-c4/hc4 Model: Hardkernel ODROID-C4 SoC: Amlogic Meson SM1 (S905X3) Revision 2b:c (10:2) DRAM: 3.8 GiB Core: 387 devices, 27 uclasses, devicetree: separate MMC: sd@ffe05000: 0, mmc@ffe07000: 1 Loading Environment from nowhere... OK In: serial Out: serial Err: serial Board variant: c4 Net: eth0: ethernet@ff3f0000 starting USB... Bus usb@ff500000: Register 3000140 NbrPorts 3 Starting the controller USB XHCI 1.10 scanning bus usb@ff500000 for devices... 3 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device Scanning mmc 0:1... Found U-Boot script /boot/boot.scr 2847 bytes read in 3 ms (926.8 KiB/s) ## Executing script at 08000000 312 bytes read in 2 ms (152.3 KiB/s) 27214336 bytes read in 1175 ms (22.1 MiB/s) 12349432 bytes read in 534 ms (22.1 MiB/s) 74543 bytes read in 10 ms (7.1 MiB/s) ## Loading init Ramdisk from Legacy Image at 13000000 ... Image Name: uInitrd Image Type: AArch64 Linux RAMDisk Image (gzip compressed) Data Size: 12349368 Bytes = 11.8 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK ## Flattened Device Tree blob at 04080000 Booting using the fdt blob at 0x4080000 Loading Ramdisk to 3f439000, end 3fffffb8 ... OK Loading Device Tree to 000000003f423000, end 000000003f43832e ... OK Starting kernel ... [ 5.881188] panfrost ffe40000.gpu: error -ENODEV: dev_pm_opp_set_regulators: no regulator (mali) found Debian GNU/Linux 11 DietPi ttyAML0 DietPi login: ```
Power-onoff commented 1 year ago

tested on the Silicon Power 64GB MicroSDXC UHS-1 Class10 microSD card and confirmed that the login screen appears after booting.

more / less
``` SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:F;RCY:0;EMMC:800;NAND:81;SD?:0;SD:0;READ:0;0.0;CHK:0; bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 no sdio debug board detected L0:00000000 L1:00000703 L2:00008067 L3:15000020 S1:00000000 B2:20282000 B1:a0f83180 TE: 765032 BL2 Built : 20:29:41, Jun 18 2019. g12a ga659aac - luan.yuan@droid15-sz Board ID = 1 Set cpu clk to 24M Set clk81 to 24M Use GP1_pll as DSU clk. DSU clk: 1200 Mhz CPU clk: 1200 MHz Set clk81 to 166.6M DDR driver_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:37 board id: 1 Load FIP HDR from SD, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SD, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SD, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 255 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg DDR4 probe ddr clk to 1320MHz Load ddrfw from SD, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of Write leveling coarse delay INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SD, src: 0x00020200, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! R0_RxClkDly_Margin==106 ps 9 R0_TxDqDly_Margi==106 ps 9 R1_RxClkDly_Margin==0 ps 0 R1_TxDqDly_Margi==0 ps 0 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001 soc_vref_reg_value 0x 00000050 0000004e 0000004d 0000004e 0000004d 0000004d 0000004b 0000004d 0000004d 0000004f 0000004d 0000004d 0000004d 0000004e 00000050 0000004d 0000004d 0000004e 0000004f 0000004e 0000004e 0000004d 0000004f 0000004f 0000004e 0000004e 0000004e 0000004e 0000004e 0000004f 0000004d 00000050 dram_vref_reg_value 0x 00000021 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:43 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00700024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass non-sec scramble use zero key ddr scramble enabled 100bdlr_step_size ps== 430 result report boot times 0Enable ddr reg access Load FIP HDR from SD, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SD, src: 0x00078200, des: 0x01768000, size: 0x0009c000, part: 0 bl2z: ptr: 05129330, size: 00001e40 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12a_v1.1.3386-3b31431 2019-05-21 10:41:54 luan.yuan@droid15-sz] OPS=0x10 ring efuse init 2b 0c 10 00 01 04 24 00 00 0d 36 30 43 57 50 50 [0.017354 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:57:33, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast U-Boot 2022.10 (Nov 13 2022 - 00:00:00 +0000) odroid-c4/hc4 Model: Hardkernel ODROID-C4 SoC: Amlogic Meson SM1 (S905X3) Revision 2b:c (10:2) DRAM: 3.8 GiB Core: 387 devices, 27 uclasses, devicetree: separate MMC: sd@ffe05000: 0, mmc@ffe07000: 1 Loading Environment from nowhere... OK In: serial Out: serial Err: serial Board variant: c4 Net: eth0: ethernet@ff3f0000 starting USB... Bus usb@ff500000: Register 3000140 NbrPorts 3 Starting the controller USB XHCI 1.10 scanning bus usb@ff500000 for devices... 3 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device Scanning mmc 0:1... Found U-Boot script /boot/boot.scr 2847 bytes read in 2 ms (1.4 MiB/s) ## Executing script at 08000000 312 bytes read in 2 ms (152.3 KiB/s) 27214336 bytes read in 1156 ms (22.5 MiB/s) 12349432 bytes read in 525 ms (22.4 MiB/s) 74543 bytes read in 7 ms (10.2 MiB/s) ## Loading init Ramdisk from Legacy Image at 13000000 ... Image Name: uInitrd Image Type: AArch64 Linux RAMDisk Image (gzip compressed) Data Size: 12349368 Bytes = 11.8 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK ## Flattened Device Tree blob at 04080000 Booting using the fdt blob at 0x4080000 Loading Ramdisk to 3f439000, end 3fffffb8 ... OK Loading Device Tree to 000000003f423000, end 000000003f43832e ... OK Starting kernel ... [ 5.277697] panfrost ffe40000.gpu: error -ENODEV: dev_pm_opp_set_regulators: no regulator (mali) found Debian GNU/Linux 11 DietPi ttyAML0 DietPi login: ```
MichaIng commented 1 year ago

So the Odroid C4 is picky on SD cards. Not sure whether this is a hardware limitation or may be solved bootloader wise.

Now it would be interesting whether old C4 image boots on those two UHS-I cards as well, so whether #5959 does bring any benefit or not. Since you are the first to report boot issues with C4 (recently), I guess we can stick with the Armbian build. But good to have an alternative at hand, since it wouldn't be the first time that an Armbian U-Boot release broke booting, or made it less reliable, like recently on NanoPi R1.


I can not say which code Armbian places in the MBR. something that the MASKROM code of the SOC, TF-A or u-boot requires.

The first 446 bytes are traditionally used for the first stage bootloader, but not sure whether it is required for those meson SoCs, which are indeed the only ones where those bytes are flashed. Probably for ancient compatibility indeed.

Btw, I just compared both binaries, and there is a larger identical pattern in their code with a few KiB offset. And the offset of this pattern is exactly 512 bytes smaller in your case. So indeed Armbian's build does contain the MBR part (for whatever reason), while yours does not.

Power-onoff commented 1 year ago

Tested on the eMMC and confirmed that the login screen appears after booting.

more / less
``` SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:F;RCY:0;EMMC:0;READ:0;0.0;CHK:0; bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 L0:00000000 L1:00000703 L2:00008067 L3:15000020 S1:00000000 B2:20282000 B1:a0f83180 TE: 308485 BL2 Built : 20:29:41, Jun 18 2019. g12a ga659aac - luan.yuan@droid15-sz Board ID = 1 Set cpu clk to 24M Set clk81 to 24M Use GP1_pll as DSU clk. DSU clk: 1200 Mhz CPU clk: 1200 MHz Set clk81 to 166.6M eMMC boot @ 0 sw8 s DDR driver_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:37 board id: 1 Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from eMMC, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from eMMC, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load 00000000 emmc switch 1 ok 00000000 emmc switch 2 ok fastboot data verify verify result: 255 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg DDR4 probe ddr clk to 1320MHz Load ddrfw from eMMC, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0 00000000 emmc switch 0 ok dmc_version 0001 Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of Write leveling coarse delay INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from eMMC, src: 0x00020200, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! R0_RxClkDly_Margin==94 ps 8 R0_TxDqDly_Margi==106 ps 9 R1_RxClkDly_Margin==0 ps 0 R1_TxDqDly_Margi==0 ps 0 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001 soc_vref_reg_value 0x 00000050 0000004e 0000004d 0000004e 0000004e 0000004d 0000004c 0000004e 0000004d 0000004f 0000004d 0000004d 0000004d 0000004e 00000051 0000004e 0000004d 0000004e 0000004f 0000004e 0000004e 0000004d 0000004f 0000004f 0000004f 0000004e 0000004e 0000004e 0000004f 0000004f 0000004d 00000050 dram_vref_reg_value 0x 00000020 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:43 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00700024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass non-sec scramble use zero key ddr scramble enabled 100bdlr_step_size ps== 430 result report boot times 0Enable ddr reg access 00000000 emmc switch 3 ok Authentication key not yet programmed get rpmb counter error 0x00000007 00000000 emmc switch 0 ok Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from eMMC, src: 0x00078200, des: 0x01768000, size: 0x0009c000, part: 0 bl2z: ptr: 05129330, size: 00001e40 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12a_v1.1.3386-3b31431 2019-05-21 10:41:54 luan.yuan@droid15-sz] OPS=0x10 ring efuse init 2b 0c 10 00 01 04 24 00 00 0d 36 30 43 57 50 50 [0.017354 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:57:33, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast U-Boot 2022.10 (Nov 13 2022 - 00:00:00 +0000) odroid-c4/hc4 Model: Hardkernel ODROID-C4 SoC: Amlogic Meson SM1 (S905X3) Revision 2b:c (10:2) DRAM: 3.8 GiB Core: 387 devices, 27 uclasses, devicetree: separate MMC: sd@ffe05000: 0, mmc@ffe07000: 1 Loading Environment from nowhere... OK In: serial Out: serial Err: serial Board variant: c4 Net: eth0: ethernet@ff3f0000 starting USB... Bus usb@ff500000: Register 3000140 NbrPorts 3 Starting the controller USB XHCI 1.10 scanning bus usb@ff500000 for devices... 3 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0 Card did not respond to voltage select! : -110 switch to partitions #0, OK mmc1(part 0) is current device Scanning mmc 1:1... Found U-Boot script /boot/boot.scr 2847 bytes read in 0 ms ## Executing script at 08000000 312 bytes read in 1 ms (304.7 KiB/s) 27214336 bytes read in 593 ms (43.8 MiB/s) 12349432 bytes read in 269 ms (43.8 MiB/s) 74543 bytes read in 3 ms (23.7 MiB/s) ## Loading init Ramdisk from Legacy Image at 13000000 ... Image Name: uInitrd Image Type: AArch64 Linux RAMDisk Image (gzip compressed) Data Size: 12349368 Bytes = 11.8 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK ## Flattened Device Tree blob at 04080000 Booting using the fdt blob at 0x4080000 Loading Ramdisk to 3f439000, end 3fffffb8 ... OK Loading Device Tree to 000000003f423000, end 000000003f43832e ... OK Starting kernel ... [ 5.202619] panfrost ffe40000.gpu: error -ENODEV: dev_pm_opp_set_regulators: no regulator (mali) found Debian GNU/Linux 11 DietPi ttyAML0 DietPi login: ```
Power-onoff commented 1 year ago

FILE: DietPi_OdroidC4-ARMv8-Bullseye.img DATE: Sun Nov 20 21:18:55 UTC 2022 MD5: b04895fe49136b5b172eca4b91fc9bf0 SHA1: c5ec31de0d164a5d087eee4b544a0c76f6fbfdc5 SHA256: ce7dac9ebffda21891e75d7f70f33fcfed2ece49e4f4ed472969ee93e217a21f

microSD card: Sandisk 16GB MicroSDHC UHS-1 Class10

confirmed that the login screen appears after booting.

more / less
``` SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:F;RCY:0;EMMC:800;NAND:81;SD?:0;SD:0;READ:0;0.0;CHK:0; bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 no sdio debug board detected L0:00000000 L1:00000703 L2:00008067 L3:15000020 S1:00000000 B2:20282000 B1:a0f83180 TE: 432815 BL2 Built : 20:29:41, Jun 18 2019. g12a ga659aac - luan.yuan@droid15-sz Board ID = 1 Set cpu clk to 24M Set clk81 to 24M Use GP1_pll as DSU clk. DSU clk: 1200 Mhz CPU clk: 1200 MHz Set clk81 to 166.6M DDR driver_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:37 board id: 1 Load FIP HDR from SD, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SD, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SD, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 255 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg DDR4 probe ddr clk to 1320MHz Load ddrfw from SD, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of Write leveling coarse delay INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SD, src: 0x00020200, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! R0_RxClkDly_Margin==106 ps 9 R0_TxDqDly_Margi==106 ps 9 R1_RxClkDly_Margin==0 ps 0 R1_TxDqDly_Margi==0 ps 0 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001 soc_vref_reg_value 0x 00000050 0000004e 0000004d 0000004e 0000004e 0000004d 0000004c 0000004e 0000004d 0000004f 0000004d 0000004d 0000004d 0000004e 00000051 0000004d 0000004d 0000004e 0000004f 0000004e 0000004e 0000004d 0000004f 0000004f 0000004f 0000004e 0000004e 0000004e 0000004f 0000004e 0000004d 00000050 dram_vref_reg_value 0x 00000021 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:43 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00700024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass non-sec scramble use zero key ddr scramble enabled 100bdlr_step_size ps== 435 result report boot times 0Enable ddr reg access Load FIP HDR from SD, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SD, src: 0x00078200, des: 0x01768000, size: 0x0009c000, part: 0 bl2z: ptr: 05129330, size: 00001e40 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12a_v1.1.3386-3b31431 2019-05-21 10:41:54 luan.yuan@droid15-sz] OPS=0x10 ring efuse init 2b 0c 10 00 01 04 24 00 00 0d 36 30 43 57 50 50 [0.017320 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:57:33, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast U-Boot 2022.07-armbian (Oct 18 2022 - 07:35:04 +0000) odroid-c4/hc4 Model: Hardkernel ODROID-C4 SoC: Amlogic Meson SM1 (S905X3) Revision 2b:c (10:2) DRAM: 3.8 GiB Core: 388 devices, 27 uclasses, devicetree: separate MMC: sd@ffe05000: 0, mmc@ffe07000: 1 Loading Environment from nowhere... OK In: serial Out: serial Err: serial Board variant: c4 Net: eth0: ethernet@ff3f0000 Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device Scanning mmc 0:1... Found U-Boot script /boot/boot.scr 2847 bytes read in 3 ms (926.8 KiB/s) ## Executing script at 08000000 312 bytes read in 2 ms (152.3 KiB/s) 26530304 bytes read in 1151 ms (22 MiB/s) 12084624 bytes read in 523 ms (22 MiB/s) 73415 bytes read in 9 ms (7.8 MiB/s) ## Loading init Ramdisk from Legacy Image at 13000000 ... Image Name: uInitrd Image Type: AArch64 Linux RAMDisk Image (gzip compressed) Data Size: 12084560 Bytes = 11.5 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK ## Flattened Device Tree blob at 04080000 Booting using the fdt blob at 0x4080000 Loading Ramdisk to 3f479000, end 3ffff550 ... OK Loading Device Tree to 000000003f464000, end 000000003f478ec6 ... OK Starting kernel ... [ 1.214952] reg-fixed-voltage regulator-flash_1v8: Failed to register regulator: -517 [ 1.215792] reg-fixed-voltage regulator-vcc_1v8: Failed to register regulator: -517 [ 1.215896] reg-fixed-voltage regulator-vcc_3v3: Failed to register regulator: -517 [ 1.216115] reg-fixed-voltage regulator-vddao_1v8: Failed to register regulator: -517 [ 2.003238] thermal thermal_zone0: binding zone cpu-thermal with cdev thermal-cpufreq-0 failed:-17 [ 2.040456] reg-fixed-voltage regulator-flash_1v8: Failed to register regulator: -517 [ 2.043011] reg-fixed-voltage regulator-vcc_1v8: Failed to register regulator: -517 [ 4.743334] panfrost ffe40000.gpu: dev_pm_opp_set_regulators: no regulator (mali) found: -19 Debian GNU/Linux 11 DietPi ttyAML0 DietPi login: ```
Power-onoff commented 1 year ago

One of the things I mentioned was a mistake Correct UHS-3 to UHS-1(U3) "Axxen microSDHC SK10 16GB TLC CLASS10 UHS-3" >> "Axxen microSDHC SK10 16GB TLC CLASS10 UHS-1(U3)" image

Here is my analysis: I don't know if there is a hardware limitation for the maximum UHS-I class or if only the necessary software support is missing, but the error message reflects exactly the facts. The fact that the firmware can be loaded from the card is due to the fact that the MASKROM uses the lowest common mode to use the greatest possible compatibility. Subsequent firmware may then try to use higher modes, which may not work. I would therefore recommend trying a maximum UHS-I class microSD card.

Power-onoff commented 1 year ago

FILE: DietPi_OdroidC4-ARMv8-Bullseye.img DATE: Sun Nov 20 21:18:55 UTC 2022 MD5: b04895fe49136b5b172eca4b91fc9bf0 SHA1: c5ec31de0d164a5d087eee4b544a0c76f6fbfdc5 SHA256: ce7dac9ebffda21891e75d7f70f33fcfed2ece49e4f4ed472969ee93e217a21f

microSD card: Axxen microSDHC SK10 16GB TLC CLASS10 UHS-1(U3)

Strangely, boot fails only on certain microSD cards Btw, I checked that it works fine on the rest except for some SD cards

more / less
``` SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:F;RCY:0;EMMC:800;NAND:81;SD?:20000;USB:8;LOOP:1;EMMC:800;NAND:81;SD?:20000;USB:8;LOOP:2;EMMC:800;NAND:81;SD?:20000;USB:8;LOOP:3;EMMC:800;NAND:81;SD?:20000;USB:8;LOOP:4;EMMC:800;NAND:81;SD?:20000;USB:8;LOOP:5;EMMC:800;NAND:81;SD?:20000;USB:8;LOOP:6;EMMC:800;NAND:81;SD?:20000;USB:8;SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:F;RCY:0;EMMC:800;NAND:81;SD?:0;SD:0;READ:0;0.0;CHK:0; bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 no sdio debug board detected L0:00000000 L1:00000703 L2:00008067 L3:15000020 S1:00000000 B2:20282000 B1:a0f83180 TE: 231322 BL2 Built : 20:29:41, Jun 18 2019. g12a ga659aac - luan.yuan@droid15-sz Board ID = 1 Set cpu clk to 24M Set clk81 to 24M Use GP1_pll as DSU clk. DSU clk: 1200 Mhz CPU clk: 1200 MHz Set clk81 to 166.6M DDR driver_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:37 board id: 1 Load FIP HDR from SD, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SD, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SD, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 255 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg DDR4 probe ddr clk to 1320MHz Load ddrfw from SD, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of Write leveling coarse delay INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SD, src: 0x00020200, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! R0_RxClkDly_Margin==118 ps 10 R0_TxDqDly_Margi==106 ps 9 R1_RxClkDly_Margin==0 ps 0 R1_TxDqDly_Margi==0 ps 0 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001 soc_vref_reg_value 0x 00000050 0000004e 0000004d 0000004e 0000004e 0000004d 0000004c 0000004e 0000004e 0000004f 0000004d 0000004e 0000004d 0000004e 00000051 0000004d 0000004d 0000004e 0000004e 0000004d 0000004e 0000004d 0000004f 0000004f 0000004e 0000004e 0000004d 0000004e 0000004e 0000004e 0000004d 00000050 dram_vref_reg_value 0x 00000021 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:43 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00700024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass non-sec scramble use zero key ddr scramble enabled 100bdlr_step_size ps== 430 result report boot times 0Enable ddr reg access Load FIP HDR from SD, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SD, src: 0x00078200, des: 0x01768000, size: 0x0009c000, part: 0 bl2z: ptr: 05129330, size: 00001e40 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12a_v1.1.3386-3b31431 2019-05-21 10:41:54 luan.yuan@droid15-sz] OPS=0x10 ring efuse init 2b 0c 10 00 01 04 24 00 00 0d 36 30 43 57 50 50 [0.017354 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:57:33, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast U-Boot 2022.07-armbian (Oct 18 2022 - 07:35:04 +0000) odroid-c4/hc4 Model: Hardkernel ODROID-C4 SoC: Amlogic Meson SM1 (S905X3) Revision 2b:c (10:2) DRAM: 3.8 GiB Core: 388 devices, 27 uclasses, devicetree: separate MMC: sd@ffe05000: 0, mmc@ffe07000: 1 Loading Environment from nowhere... OK In: serial Out: serial Err: serial Board variant: c4 Net: eth0: ethernet@ff3f0000 Hit any key to stop autoboot: 0 Card did not respond to voltage select! : -110 MMC Device 2 not found no mmc device at slot 2 starting USB... Bus usb@ff500000: Register 3000140 NbrPorts 3 Starting the controller USB XHCI 1.10 scanning bus usb@ff500000 for devices... 3 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Device 0: unknown device Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.5 (82 ms) *** ERROR: `serverip' not set Cannot autoload with TFTPGET missing environment variable: pxeuuid Retrieving file: pxelinux.cfg/01-00-1e-06-48-0f-ab Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A80005 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A8000 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A800 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A80 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A8 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default-arm-meson-odroid-n2 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default-arm-meson Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default-arm Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default Speed: 1000, full duplex *** ERROR: `serverip' not set Config file not found Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.5 (81 ms) *** ERROR: `serverip' not set Cannot autoload with TFTPGET Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.5 (178 ms) *** ERROR: `serverip' not set Cannot autoload with TFTPGET => ```
MichaIng commented 1 year ago

Okay, so it fails to boot from Axxen microSDHC SK10 16GB TLC CLASS10 UHS-1(U3) with any image and succeeds to boot from any other SD card you tested, right?

Then for now I don't see a reason to switch U-Boot, but good to have it in mind and available, in case we find cases where one boots but the other not.

MichaIng commented 1 year ago

Many thanks for all your tests btw! Since I don't have a C4 myself, this is very valuable!

usual-user commented 1 year ago

As it looks now, the firmware has a problem with the use of class UHS-1(U3) microSD cards. u-boot-meson.zip I would like to see the result of a small experiment. Replace the firmware on the failing microSD card with the unpacked attached one: dd bs=512 seek=1 conv=notrunc,fsync if=u-boot-meson.bin of=/dev/${$MEDIA} Post the serial console log with this firmware used.

Power-onoff commented 1 year ago

As it looks now, the firmware has a problem with the use of class UHS-1(U3) microSD cards. u-boot-meson.zip I would like to see the result of a small experiment. Replace the firmware on the failing microSD card with the unpacked attached one: dd bs=512 seek=1 conv=notrunc,fsync if=u-boot-meson.bin of=/dev/${$MEDIA} Post the serial console log with this firmware used.

FILE: DietPi_OdroidC4-ARMv8-Bullseye.img DATE: Sun Nov 20 21:18:55 UTC 2022 MD5: b04895fe49136b5b172eca4b91fc9bf0 SHA1: c5ec31de0d164a5d087eee4b544a0c76f6fbfdc5 SHA256: ce7dac9ebffda21891e75d7f70f33fcfed2ece49e4f4ed472969ee93e217a21f

microSD card: Axxen microSDHC SK10 16GB TLC CLASS10 UHS-1(U3)

Executed a command in the dietpi virtualbox dd bs=512 seek=1 conv=notrunc,fsync if=u-boot-meson.bin of=/dev/sdc

more / less
``` SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:F;RCY:0;EMMC:800;NAND:81;SD?:0;SD:0;READ:0;0.0;CHK:0; bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 no sdio debug board detected L0:00000000 L1:00000703 L2:00008067 L3:15000020 S1:00000000 B2:20282000 B1:a0f83180 TE: 255998 BL2 Built : 20:29:41, Jun 18 2019. g12a ga659aac - luan.yuan@droid15-sz Board ID = 1 Set cpu clk to 24M Set clk81 to 24M Use GP1_pll as DSU clk. DSU clk: 1200 Mhz CPU clk: 1200 MHz Set clk81 to 166.6M DDR driver_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:37 board id: 1 Load FIP HDR from SD, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SD, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SD, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 255 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg DDR4 probe ddr clk to 1320MHz Load ddrfw from SD, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of Write leveling coarse delay INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SD, src: 0x00020200, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! R0_RxClkDly_Margin==106 ps 9 R0_TxDqDly_Margi==106 ps 9 R1_RxClkDly_Margin==0 ps 0 R1_TxDqDly_Margi==0 ps 0 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001 soc_vref_reg_value 0x 00000050 0000004e 0000004d 0000004e 0000004d 0000004c 0000004b 0000004e 0000004d 0000004e 0000004d 0000004d 0000004d 0000004e 00000051 0000004d 0000004d 0000004e 0000004e 0000004d 0000004d 0000004d 0000004f 0000004e 0000004e 0000004e 0000004d 0000004d 0000004e 0000004e 0000004c 0000004f dram_vref_reg_value 0x 00000021 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:43 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00700024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass non-sec scramble use zero key ddr scramble enabled 100bdlr_step_size ps== 435 result report boot times 0Enable ddr reg access Load FIP HDR from SD, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SD, src: 0x00078200, des: 0x01768000, size: 0x0009c000, part: 0 bl2z: ptr: 05129330, size: 00001e40 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12a_v1.1.3386-3b31431 2019-05-21 10:41:54 luan.yuan@droid15-sz] OPS=0x10 ring efuse init 2b 0c 10 00 01 04 24 00 00 0d 36 30 43 57 50 50 [0.017319 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:57:33, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast U-Boot 2023.01-rc2 (Dec 07 2022 - 00:00:00 +0000) odroid-c4/hc4 Model: Hardkernel ODROID-C4 SoC: Amlogic Meson SM1 (S905X3) Revision 2b:c (10:2) DRAM: 1 GiB (effective 3.8 GiB) Core: 387 devices, 27 uclasses, devicetree: separate MMC: sd@ffe05000: 0, mmc@ffe07000: 1 Loading Environment from nowhere... OK In: serial Out: serial Err: serial Board variant: c4 Net: eth0: ethernet@ff3f0000 starting USB... Bus usb@ff500000: Register 3000140 NbrPorts 3 Starting the controller USB XHCI 1.10 scanning bus usb@ff500000 for devices... 3 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0 Card did not respond to voltage select! : -110 MMC Device 2 not found no mmc device at slot 2 Device 0: unknown device Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.5 (67 ms) *** ERROR: `serverip' not set Cannot autoload with TFTPGET missing environment variable: pxeuuid Retrieving file: pxelinux.cfg/01-00-1e-06-48-0f-ab Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A80005 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A8000 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A800 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A80 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A8 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default-arm-meson-odroid-n2 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default-arm-meson Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default-arm Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default Speed: 1000, full duplex *** ERROR: `serverip' not set Config file not found Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.5 (103 ms) *** ERROR: `serverip' not set Cannot autoload with TFTPGET Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.5 (188 ms) *** ERROR: `serverip' not set Cannot autoload with TFTPGET => ```
usual-user commented 1 year ago

Damn, I wanted to apply a patch for the experiment, but fat finger typed the name and it's missing. Can you redo the experiment with this attached one? u-boot-meson.zip

Power-onoff commented 1 year ago

I don't know if it's helpful information, but it's the result of installing several OS images on a micro sd card that couldn't boot

Boot failed

  1. Armbian_22.11.1_Odroidc4_bullseye_current_5.19.17_minimal.img.xz

Boot Successful

  1. Debian-Buster64-1.1.3-20210512-C4.img
  2. ubuntu-20.04-4.9-minimal-odroid-c4-20200526.img
  3. ubuntu-20.04-4.9-minimal-odroid-c4-hc4-20220228.img
MichaIng commented 1 year ago

The images which succeed are all with the same vendor bootloader. So it's a limitation of the mainline U-Boot. As always, sad that manufacturers do not commit their necessary bootloader (same with kernel) support upstream in the first place, but keep maintaining an own fork, usually without ever updating (just patching) it 😞.

In the meantime, Meveric switched to mainline kernel and U-Boot as well. I guess his newer C4 image fail the same way: https://oph.mdrjr.net/meveric/images/Bullseye/

Power-onoff commented 1 year ago

Damn, I wanted to apply a patch for the experiment, but fat finger typed the name and it's missing. Can you redo the experiment with this attached one? u-boot-meson.zip

FILE: DietPi_OdroidC4-ARMv8-Bullseye.img DATE: Sun Nov 20 21:18:55 UTC 2022 MD5: b04895fe49136b5b172eca4b91fc9bf0 SHA1: c5ec31de0d164a5d087eee4b544a0c76f6fbfdc5 SHA256: ce7dac9ebffda21891e75d7f70f33fcfed2ece49e4f4ed472969ee93e217a21f

microSD card: Axxen microSDHC SK10 16GB TLC CLASS10 UHS-1(U3)

Executed a command in the dietpi virtualbox dd bs=512 seek=1 conv=notrunc,fsync if=u-boot-meson.bin of=/dev/sdc

more / less
``` SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:F;RCY:0;EMMC:800;NAND:81;SD?:0;SD:0;READ:0;0.0;CHK:0; bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 no sdio debug board detected L0:00000000 L1:00000703 L2:00008067 L3:15000020 S1:00000000 B2:20282000 B1:a0f83180 TE: 235212 BL2 Built : 20:29:41, Jun 18 2019. g12a ga659aac - luan.yuan@droid15-sz Board ID = 1 Set cpu clk to 24M Set clk81 to 24M Use GP1_pll as DSU clk. DSU clk: 1200 Mhz CPU clk: 1200 MHz Set clk81 to 166.6M DDR driver_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:37 board id: 1 Load FIP HDR from SD, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SD, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SD, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 255 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg DDR4 probe ddr clk to 1320MHz Load ddrfw from SD, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of Write leveling coarse delay INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SD, src: 0x00020200, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! R0_RxClkDly_Margin==106 ps 9 R0_TxDqDly_Margi==106 ps 9 R1_RxClkDly_Margin==0 ps 0 R1_TxDqDly_Margi==0 ps 0 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001 soc_vref_reg_value 0x 00000050 0000004e 0000004d 0000004e 0000004d 0000004d 0000004c 0000004e 0000004d 0000004f 0000004e 0000004d 0000004d 0000004e 00000051 0000004d 0000004d 0000004e 0000004e 0000004d 0000004d 0000004c 0000004f 0000004e 0000004e 0000004e 0000004d 0000004d 0000004e 0000004e 0000004c 00000050 dram_vref_reg_value 0x 00000021 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:43 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00700024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass non-sec scramble use zero key ddr scramble enabled 100bdlr_step_size ps== 440 result report boot times 0Enable ddr reg access Load FIP HDR from SD, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SD, src: 0x00078200, des: 0x01768000, size: 0x0009c000, part: 0 bl2z: ptr: 05129330, size: 00001e40 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12a_v1.1.3386-3b31431 2019-05-21 10:41:54 luan.yuan@droid15-sz] OPS=0x10 ring efuse init 2b 0c 10 00 01 04 24 00 00 0d 36 30 43 57 50 50 [0.017320 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:57:33, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast U-Boot 2023.01-rc2 (Dec 07 2022 - 00:00:00 +0000) odroid-c4/hc4 Model: Hardkernel ODROID-C4 SoC: Amlogic Meson SM1 (S905X3) Revision 2b:c (10:2) DRAM: 1 GiB (effective 3.8 GiB) Core: 387 devices, 27 uclasses, devicetree: separate MMC: sd@ffe05000: 0, mmc@ffe07000: 1 Loading Environment from nowhere... OK In: serial Out: serial Err: serial Board variant: c4 Net: eth0: ethernet@ff3f0000 starting USB... Bus usb@ff500000: Register 3000140 NbrPorts 3 Starting the controller USB XHCI 1.10 scanning bus usb@ff500000 for devices... 3 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0 Card did not respond to voltage select! : -110 MMC Device 2 not found no mmc device at slot 2 Device 0: unknown device Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.5 (154 ms) *** ERROR: `serverip' not set Cannot autoload with TFTPGET missing environment variable: pxeuuid Retrieving file: pxelinux.cfg/01-00-1e-06-48-0f-ab Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A80005 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A8000 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A800 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A80 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A8 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0A Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C0 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/C Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default-arm-meson-odroid-n2 Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default-arm-meson Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default-arm Speed: 1000, full duplex *** ERROR: `serverip' not set Retrieving file: pxelinux.cfg/default Speed: 1000, full duplex *** ERROR: `serverip' not set Config file not found Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.5 (69 ms) *** ERROR: `serverip' not set Cannot autoload with TFTPGET Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.0.5 (185 ms) *** ERROR: `serverip' not set Cannot autoload with TFTPGET => ```
Power-onoff commented 1 year ago

The images which succeed are all with the same vendor bootloader. So it's a limitation of the mainline U-Boot. As always, sad that manufacturers do not commit their necessary bootloader (same with kernel) support upstream in the first place, but keep maintaining an own fork, usually without ever updating (just patching) it 😞.

In the meantime, Meveric switched to mainline kernel and U-Boot as well. I guess his newer C4 image fail the same way: https://oph.mdrjr.net/meveric/images/Bullseye/

Tested the image file "Debian-Bullsey64-1.0-20221003-C4.img.xz" and successfully booted.

more / less
``` SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:F;RCY:0;EMMC:800;NAND:81;SD?:0;SD:0;READ:0;0.0;CHK:0; bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 no sdio debug board detected L0:00000000 L1:00000703 L2:00008067 L3:15000020 S1:00000000 B2:20282000 B1:a0f83180 TE: 239060 BL2 Built : 22:54:32, Apr 28 2020. g12a ga659aac-dirty - changqing.gao@droid11 Board ID = 1 Set cpu clk to 24M Set clk81 to 24M Use GP1_pll as DSU clk. DSU clk: 1200 Mhz CPU clk: 1200 MHz Set clk81 to 166.6M DDR driver_vesion: LPDDR4_PHY_V_0_1_15 build time: Apr 28 2020 22:54:28 board id: 1 Load FIP HDR from SD, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SD, src: 0x00030200, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SD, src: 0x0002c200, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 255 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg DDR4 probe ddr clk to 1320MHz Load ddrfw from SD, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of Write leveling coarse delay INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SD, src: 0x00020200, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! R0_RxClkDly_Margin==94 ps 8 R0_TxDqDly_Margi==106 ps 9 R1_RxClkDly_Margin==0 ps 0 R1_TxDqDly_Margi==0 ps 0 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001 soc_vref_reg_value 0x 00000050 0000004e 0000004d 0000004e 0000004d 0000004d 0000004c 0000004e 0000004d 0000004f 0000004e 0000004e 0000004d 0000004e 00000051 0000004d 0000004c 0000004e 0000004e 0000004d 0000004d 0000004c 0000004f 0000004e 0000004e 0000004e 0000004d 0000004e 0000004e 0000004e 0000004c 0000004f dram_vref_reg_value 0x 00000021 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_15 build time: Jun 18 2019 20:29:43 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00700024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass non-sec scramble use zero key ddr scramble enabled 100bdlr_step_size ps== 430 result report boot times 1Enable ddr reg access Load FIP HDR from SD, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SD, src: 0x0003c200, des: 0x0172c000, size: 0x0009c000, part: 0 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12a_v1.1.3386-3b31431 2019-05-21 10:41:54 luan.yuan@droid15-sz] OPS=0x10 ring efuse init 2b 0c 10 00 01 04 24 00 00 0d 36 30 43 57 50 50 [1.141687 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:57:33, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast U-Boot 2015.01 (Aug 07 2020 - 08:55:43) DRAM: 3.5 GiB Relocation Offset is: d6eee000 spi_post_bind(spifc): req_seq = 0 register usb cfg[0][1] = 00000000d7f83bc8 MMC: aml_priv->desc_buf = 0x00000000d3ede7c0 aml_priv->desc_buf = 0x00000000d3ee0b00 SDIO Port C: 0, SDIO Port B: 1 card in co-phase 0x2, tx-dly 0, clock 400000 co-phase 0x2, tx-dly 0, clock 400000 co-phase 0x2, tx-dly 0, clock 400000 co-phase 0x2, tx-dly 0, clock 400000 co-phase 0x2, tx-dly 0, clock 40000000 aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x182000 [mmc_startup] mmc refix success [mmc_init] mmc init success In: serial Out: serial Err: serial vpu: error: vpu: check dts: FDT_ERR_BADMAGIC, load default parameters vpu: driver version: v20190313 vpu: detect chip type: 12 vpu: clk_level default: 7(666667000Hz), max: 7(666667000Hz) vpu: clk_level = 7 vpu: vpu_power_on vpu: set_vpu_clk vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100) vpu: set_vpu_clk finish vpu: vpu_module_init_config vpp: vpp_init vpp: g12a/b osd1 matrix rgb2yuv .............. vpp: g12a/b osd2 matrix rgb2yuv.............. vpp: g12a/b osd3 matrix rgb2yuv.............. cvbs: cpuid:0x2b cvbs_config_hdmipll_g12a cvbs_set_vid2_clk reading boot-logo.bmp.gz ** Unable to read file boot-logo.bmp.gz ** reading boot-logo.bmp ** Unable to read file boot-logo.bmp ** movi: not registered partition name, logo movi - Read/write command from/to SD/MMC for ODROID board Usage: movi
[] - the command to access the storage - the offset from the start of given partiton in lba -
the memory address to load/store from/to the storage device - [] the size of the block to read/write in bytes - all parameters must be hexa-decimal only [OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters [OSD]set initrd_high: 0x3d800000 [OSD]fb_addr for logo: 0x3d800000 [OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters [OSD]fb_addr for logo: 0x3d800000 [OSD]VPP_OFIFO_SIZE:0xfff01fff [CANVAS]canvas init [CANVAS]addr=0x3d800000 width=5760, height=2160 cvbs: outputmode[1080p60hz] is invalid vpp: vpp_matrix_update: 2 set hdmitx VIC = 16 config HPLL = 5940000 frac_rate = 1 HPLL: 0x3b3a04f7 HPLL: 0x1b3a04f7 HPLLv1: 0xdb3a04f7 config HPLL done j = 6 vid_clk_div = 1 hdmitx phy setting done hdmitx: set enc for VIC: 16 enc_vpu_bridge_reset[1319] rx version is 1.4 or below div=10 USB3.0 XHCI init start Net: dwmac.ff3f0000 [OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters [OSD]fb_addr for logo: 0x3d800000 [OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters [OSD]fb_addr for logo: 0x3d800000 [OSD]VPP_OFIFO_SIZE:0xfff01000 reading logo.bmp.gz ** Unable to read file logo.bmp.gz ** reading logo.bmp ** Unable to read file logo.bmp ** co-phase 0x2, tx-dly 0, clock 400000 co-phase 0x2, tx-dly 0, clock 400000 co-phase 0x2, tx-dly 0, clock 400000 emmc/sd response timeout, cmd8, status=0x1ff2800 emmc/sd response timeout, cmd55, status=0x1ff2800 emmc/sd response timeout, cmd1, status=0x1ff2800 ** Bad device mmc 0 ** co-phase 0x2, tx-dly 0, clock 400000 co-phase 0x2, tx-dly 0, clock 400000 co-phase 0x2, tx-dly 0, clock 400000 emmc/sd response timeout, cmd8, status=0x1ff2800 emmc/sd response timeout, cmd55, status=0x1ff2800 emmc/sd response timeout, cmd1, status=0x1ff2800 ** Bad device mmc 0 ** cvbs: outputmode[1080p60hz] is invalid vpp: vpp_matrix_update: 2 set hdmitx VIC = 16 config HPLL = 5940000 frac_rate = 1 HPLL: 0x3b3a04f7 HPLL: 0x1b3a04f7 HPLLv1: 0xdb3a04f7 config HPLL done j = 6 vid_clk_div = 1 hdmitx phy setting done hdmitx: set enc for VIC: 16 enc_vpu_bridge_reset[1319] rx version is 1.4 or below div=10 Hit Enter or space or Ctrl+C key to stop autoboot -- : 0 reading boot.ini 5776 bytes read in 3 ms (1.8 MiB/s) ## Executing script at 01000000 HDMI cable is NOT connected reading Image.gz 8885036 bytes read in 477 ms (17.8 MiB/s) reading meson64_odroidc4.dtb 70534 bytes read in 8 ms (8.4 MiB/s) reading uInitrd 8005264 bytes read in 430 ms (17.8 MiB/s) reading overlays/odroidc4/spi0.dtbo 516 bytes read in 5 ms (100.6 KiB/s) reading overlays/odroidc4/i2c0.dtbo 223 bytes read in 5 ms (43 KiB/s) reading overlays/odroidc4/i2c1.dtbo 223 bytes read in 5 ms (43 KiB/s) reading overlays/odroidc4/uart0.dtbo 225 bytes read in 5 ms (43.9 KiB/s) Uncompressed size: 24590848 = 0x1773A00 ## Loading init Ramdisk from Legacy Image at 03700000 ... Image Name: uInitrd Image Type: AArch64 Linux RAMDisk Image (uncompressed) Data Size: 8005200 Bytes = 7.6 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK active_slot is Unknown command 'store' - try 'help' No dtbo patitions found load dtb from 0x1000000 ...... ## Flattened Device Tree blob at 01000000 Booting using the fdt blob at 0x1000000 No valid dtbo image found reserving fdt memory region: addr=1000000 size=28000 Loading Ramdisk to 3d05d000, end 3d7ff650 ... OK Loading Device Tree to 000000001ffd5000, end 000000001fffffff ... OK Starting kernel ... uboot time: 5609258 us pwr_key=ffffffff [ 0.000000@0] Booting Linux on physical CPU 0x0 [ 0.000000@0] Linux version 4.9.241-arm64 (root@odroid-stretch64) (gcc version 6.3.0 20170516 (Debian 6.3.0-18+deb9u1) ) #1 SMP PREEMPT Thu Feb 25 17:57:15 CET 2021 [ 0.000000@0] Boot CPU: AArch64 Processor [411fd050] [ 0.000000@0] Machine model: Hardkernel ODROID-C4 [ 0.000000@0] efi: Getting EFI parameters from FDT: [ 0.000000@0] efi: UEFI not found. [ 0.000000@0] 07400000 - 07500000, 1024 KB, ramoops@0x07400000 [ 0.000000@0] __reserved_mem_alloc_size, start:0x0000000005000000, end:0x0000000005400000, len:4 MiB [ 0.000000@0] 05000000 - 05400000, 4096 KB, linux,secmon [ 0.000000@0] Reserved memory: created DMA memory pool at 0x00000000ed800000, size 0 MiB [ 0.000000@0] ed800000 - ed800000, 0 KB, linux,ppmgr [ 0.000000@0] __reserved_mem_alloc_size, start:0x000000007f800000, end:0x0000000080000000, len:8 MiB [ 0.000000@0] 7f800000 - 80000000, 8192 KB, linux,meson-fb [ 0.000000@0] e5800000 - ed800000, 131072 KB, linux,ion-dev [ 0.000000@0] e3000000 - e5800000, 40960 KB, linux,di_cma [ 0.000000@0] cfc00000 - e3000000, 315392 KB, linux,codec_mm_cma [ 0.000000@0] cfc00000 - cfc00000, 0 KB, linux,codec_mm_reserved [ 0.000000@0] cma: Reserved 8 MiB at 0x00000000cf400000 [ 0.000000@0] psci: probing for conduit method from DT. [ 0.000000@0] psci: PSCIv1.0 detected in firmware. [ 0.000000@0] psci: Using standard PSCI v0.2 function IDs [ 0.000000@0] psci: MIGRATE_INFO_TYPE not supported. [ 0.000000@0] psci: SMC Calling Convention v1.1 [ 0.000000@0] percpu: Embedded 21 pages/cpu s48024 r8192 d29800 u86016 [ 0.000000@0] Detected VIPT I-cache on CPU0 [ 0.000000@0] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 957600 [ 0.000000@0] Kernel command line: root=UUID=e139ce78-9841-40fe-8823-96a304a09859 rootwait ro console=ttyS0,115200n8 no_console_suspend fsck.repair=yes net.ifnames=0 elevator=noop hdmimode=1080p60hz cvbsmode=576cvbs max_freq_a55= maxcpus=4 voutmode=hdmi disablehpd=false cvbscable=0 overscan=100 monitor_onoff=false logo=osd0,loaded sdrmode=auto enable_wol=0 [ 0.000000@0] vout: get hdmimode: 1080p60hz [ 0.000000@0] vout: get cvbsmode: 576cvbs [ 0.000000@0] hdmitx: voutmode : 1 [ 0.000000@0] fb: osd0 [ 0.000000@0] fb: loaded [ 0.000000@0] PID hash table entries: 4096 (order: 3, 32768 bytes) [ 0.000000@0] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes) [ 0.000000@0] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes) [ 0.000000@0] Memory: 3280404K/3891200K available (12028K kernel code, 1806K rwdata, 5152K rodata, 4992K init, 1410K bss, 102892K reserved, 507904K cma-reserved) [ 0.000000@0] Virtual kernel memory layout: [ 0.000000@0] modules : 0xffffff8000000000 - 0xffffff8008000000 ( 128 MB) [ 0.000000@0] vmalloc : 0xffffff8008000000 - 0xffffffbebfff0000 ( 250 GB) [ 0.000000@0] .text : 0xffffff8009080000 - 0xffffff8009c40000 ( 12032 KB) [ 0.000000@0] .rodata : 0xffffff8009c40000 - 0xffffff800a150000 ( 5184 KB) [ 0.000000@0] .init : 0xffffff800a150000 - 0xffffff800a630000 ( 4992 KB) [ 0.000000@0] .data : 0xffffff800a630000 - 0xffffff800a7f3a00 ( 1807 KB) [ 0.000000@0] .bss : 0xffffff800a7f3a00 - 0xffffff800a9545fc ( 1411 KB) [ 0.000000@0] fixed : 0xffffffbefe7fd000 - 0xffffffbefec00000 ( 4108 KB) [ 0.000000@0] PCI I/O : 0xffffffbefee00000 - 0xffffffbeffe00000 ( 16 MB) [ 0.000000@0] vmemmap : 0xffffffbf00000000 - 0xffffffc000000000 ( 4 GB maximum) [ 0.000000@0] 0xffffffbf00000000 - 0xffffffbf03b60000 ( 59 MB actual) [ 0.000000@0] memory : 0xffffffc000000000 - 0xffffffc0ed800000 ( 3800 MB) [ 0.000000@0] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 [ 0.000000@0] Preemptible hierarchical RCU implementation. [ 0.000000@0] Build-time adjustment of leaf fanout to 64. [ 0.000000@0] RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4. [ 0.000000@0] RCU: Adjusting geometry for rcu_fanout_leaf=64, nr_cpu_ids=4 [ 0.000000@0] NR_IRQS:64 nr_irqs:64 0 [ 0.000000@0] GPIO-INTC: support to detect double-edge trigger signal [ 0.000000@0] g12a_aoclkc_init: register ao clk ok! [ 0.000000@0] Meson chip version = RevC (2B:C - 10:0) [ 0.000000@0] meson_g12a_sdemmc_init: register amlogic sdemmc clk [ 0.000000@0] meson_g12a_sdemmc_init: register amlogic sdemmc clk [ 0.000000@0] meson_g12a_gpu_init: register meson gpu clk [ 0.000000@0] meson_g12a_media_init: register meson media clk [ 0.000000@0] meson_g12a_misc_init: register amlogic g12a misc clks [ 0.000000@0] meson_g12a_misc_init: done. [ 0.000000@0] g12a_clkc_init initialization complete [ 0.000000@0] sm1 clk probe ok [ 0.000000@0] arm_arch_timer: Architected cp15 timer(s) running at 24.00MHz (phys). [ 0.000000@0] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns [ 0.000003@0] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 4398046511097ns [ 0.000031@0] meson_bc_timer: mclk->mux_reg =ffffff800800c190,mclk->reg =ffffff800800e194 [ 0.000433@0] Console: colour dummy device 80x25 [ 0.000450@0] Calibrating delay loop (skipped), value calculated using timer frequency.. 48.00 BogoMIPS (lpj=96000) [ 0.000459@0] pid_max: default: 32768 minimum: 301 [ 0.000543@0] Security Framework initialized [ 0.000564@0] AppArmor: AppArmor initialized [ 0.000594@0] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes) [ 0.000602@0] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes) [ 0.001159@0] ftrace: allocating 39957 entries in 157 pages [ 0.063407@0] sched-energy: CPU device node has no sched-energy-costs [ 0.063419@0] CPU0: update cpu_capacity 1024 [ 0.063431@0] ASID allocator initialised with 65536 entries [ 0.107466@0] secmon: can't fine clear_range [ 0.107996@0] EFI services will not be available. [ 0.155896@1] Detected VIPT I-cache on CPU1 [ 0.155942@1] CPU1: update cpu_capacity 1024 [ 0.155944@1] CPU1: Booted secondary processor [411fd050] [ 0.187965@2] Detected VIPT I-cache on CPU2 [ 0.187997@2] CPU2: update cpu_capacity 1024 [ 0.187999@2] CPU2: Booted secondary processor [411fd050] [ 0.220053@3] Detected VIPT I-cache on CPU3 [ 0.220083@3] CPU3: update cpu_capacity 1024 [ 0.220085@3] CPU3: Booted secondary processor [411fd050] [ 0.220167@0] Brought up 4 CPUs [ 0.220193@0] SMP: Total of 4 processors activated. [ 0.220200@0] CPU features: detected feature: Privileged Access Never [ 0.220204@0] CPU features: detected feature: User Access Override [ 0.220208@0] CPU features: detected feature: 32-bit EL0 Support [ 0.220351@0] CPU: All CPU(s) started at EL2 [ 0.220370@0] alternatives: patching kernel code [ 0.222327@0] devtmpfs: initialized [ 0.236712@0] DMI not present or invalid. [ 0.237008@0] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns [ 0.237022@0] futex hash table entries: 1024 (order: 4, 65536 bytes) [ 0.237190@0] pinctrl core: initialized pinctrl subsystem [ 0.237905@0] NET: Registered protocol family 16 [ 0.238979@0] schedtune: init normalization constants... [ 0.238986@0] schedtune: no energy model data [ 0.238989@0] schedtune: disabled! [ 0.247825@0] cpuidle: using governor menu [ 0.247911@0] register canvas platform driver [ 0.247942@0] register rdma platform driver [ 0.249072@0] vdso: 2 pages (1 code @ ffffff8009c47000, 1 data @ ffffff800a635000) [ 0.249085@0] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers. [ 0.250137@1] DMA: preallocated 2048 KiB pool for atomic allocations [ 0.250313@1] clkmsr: clkmsr: driver init [ 0.250320@1] codec_mm_module_init [ 0.250344@1] media_configs_system_init [ 0.251271@1] pstore: using zlib compression [ 0.251656@1] console [pstore-1] enabled [ 0.251662@1] pstore: Registered ramoops as persistent store backend [ 0.251668@1] ramoops: attached 0x100000@0x7400000, ecc: 0/0 [ 0.253247@1] aml_iomap: amlogic iomap probe done [ 0.253673@1] vpu: driver version: v20190329(10-sm1) [ 0.253685@1] vpu: load vpu_clk: 666666667Hz(7) [ 0.253882@1] vpu: clktree_init [ 0.253934@1] vpu: vpu_probe OK [ 0.258058@1] clkmsr: msr_clk_reg0=ffffff8008453004,msr_clk_reg2=ffffff800845500c [ 0.258076@1] clkmsr: msr_ring_reg0=ffffff80084575fc [ 0.260717@1] audio_clocks: audio_clocks_probe done [ 0.261569@1] aml_snd_reg_map[0], reg:ff661000, size:400 [ 0.261587@1] aml_snd_reg_map[1], reg:ff660000, size:1000 [ 0.261601@1] aml_snd_reg_map[2], reg:ff661400, size:400 [ 0.261614@1] aml_snd_reg_map[3], reg:ff662000, size:1000 [ 0.261628@1] aml_snd_reg_map[4], reg:ffd01000, size:1000 [ 0.261641@1] aml_snd_reg_map[5], reg:ff661800, size:400 [ 0.261654@1] aml_snd_reg_map[6], reg:ff661c00, size:104 [ 0.261666@1] aml_snd_reg_map[7], reg:ff664000, size:104 [ 0.261672@1] amlogic auge_snd_iomap probe done [ 0.262874@1] aml_vdac_config_probe: cpu_id:6, name:meson-sm1-vdac [ 0.263039@1] aml_vdac_probe: ok [ 0.263168@1] canvas_probe reg=00000000ff638000,size=2000 [ 0.263187@1] canvas maped reg_base =ffffff800846c000 [ 0.268443@1] rdma_probe,cpu_type:1, ver:0, len:8 [ 0.268660@1] rdma_register, rdma_table_addr ffffff80084a1000 rdma_table_addr_phy cf600000 reg_buf ffffffc0ca128000 [ 0.268670@1] rdma_register success, handle 1 table_size 32768 [ 0.268676@1] set_rdma_handle video rdma handle = 1. [ 0.268706@1] classs created ok [ 0.268719@1] classs file created ok [ 0.270250@1] codec_mm codec_mm: assigned reserved memory node linux,codec_mm_cma [ 0.270349@1] codec_mm codec_mm: assigned reserved memory node linux,codec_mm_cma [ 0.270358@1] codec_mm_probe ok [ 0.271030@1] cvbs_out: cvbsout_probe, cpu_id:7,name:meson-sm1-cvbsout [ 0.271047@1] cvbs_out: clk path:0 [ 0.271053@1] cvbs_out: error: failed to get vdac_config [ 0.271192@1] vout: vout1: register server: cvbs_vout_server [ 0.271199@1] cvbs_out: register cvbs module server ok [ 0.271205@1] vout: vout2: register server: cvbs_vout2_server [ 0.271211@1] cvbs_out: register cvbs module vout2 server ok [ 0.271218@1] cvbs_out: chrdev devno 264241152 for disp [ 0.271387@1] cvbs_out: create cdev cvbs [ 0.271395@1] cvbs_out: cvbsout_probe OK [ 0.438567@1] SCSI subsystem initialized [ 0.438807@1] usbcore: registered new interface driver usbfs [ 0.438862@1] usbcore: registered new interface driver hub [ 0.438966@1] usbcore: registered new device driver usb [ 0.439082@1] media: Linux media interface: v0.10 [ 0.439126@1] Linux video capture interface: v2.00 [ 0.439218@1] pps_core: LinuxPPS API ver. 1 registered [ 0.439226@1] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti [ 0.439253@1] PTP clock support registered [ 0.439412@1] dmi: Firmware registration failed. [ 0.439723@1] secmon: reserve_mem_size:0x300000 [ 0.439802@1] secmon secmon: assigned reserved memory node linux,secmon [ 0.439986@1] secmon: get page:ffffffbf00140000, 5000 [ 0.439995@1] secmon: share in base: 0xffffffc0050fe000, share out base: 0xffffffc0050ff000 [ 0.440001@1] secmon: phy_in_base: 0x50fe000, phy_out_base: 0x50ff000 [ 0.440648@1] hdmitx: system: amhdmitx_probe start [ 0.440657@1] hdmitx: system: Ver: 20190815 [ 0.440693@1] hdmitx: system: hdmitx_device.chip_type : 12 [ 0.440729@1] hdmitx: system: not find match pwr-ctl [ 0.440773@1] hdmitx: system: not find drm_amhdmitx [ 0.440794@1] hdmitx: system: hpd irq = 43 [ 0.440896@1] hdmitx: system: hdcp22_tx_skp failed to probe [ 0.440905@1] hdmitx: system: hdcp22_tx_esm failed to probe [ 0.441294@1] vout: vout1: register server: hdmitx_vout_server [ 0.441303@1] vout: vout2: register server: hdmitx_vout2_server [ 0.441800@1] hdmitx: hdmitx20: Mapped PHY: 0xffd00000 [ 0.441818@1] hdmitx: hdmitx20: Mapped PHY: 0xff634400 [ 0.441830@1] hdmitx: hdmitx20: Mapped PHY: 0xff900000 [ 0.441843@1] hdmitx: hdmitx20: Mapped PHY: 0xff800000 [ 0.441852@1] hdmitx: hdmitx20: Mapped PHY: 0xff63c000 [ 0.441859@1] hdmitx: hdmitx20: Mapped PHY: 0xffd00000 [ 0.441866@1] hdmitx: hdmitx20: Mapped PHY: 0xff608000 [ 0.441872@1] hdmitx: hdmitx20: Mapped PHY: 0xff600000 [ 0.441880@1] hdmitx: hdmitx20: Mapped PHY: 0xffe01000 [ 0.441891@1] hdmitx: hw: alread display in uboot 0x10 [ 0.441921@1] hdmitx: hw: avmute set to 1 [ 0.441930@1] hdmitx: system: fmt_attr 444,8bit [ 0.441935@1] hdmitx: system: fmt_attr 444,8bit [ 0.442011@1] hdmitx: system: amhdmitx_probe end [ 0.442351@1] vout: create vout attribute OK [ 0.442489@1] vout: vout_fops_create OK [ 0.442498@1] vout: vout1: register server: nulldisp_vout_server [ 0.442589@1] vout: tvout monitor interval:500(ms), timeout cnt:20 [ 0.442612@1] hdmitx: hdmitx_set_current_vmode[3877] [ 0.442618@1] hdmitx: system: recalc before 1080p60hz 60 1 [ 0.442626@1] hdmitx: system: recalc after 1080p60hz 2997 50 [ 0.442631@1] hdmitx: alread display in uboot [ 0.442636@1] vout: init mode 1080p60hz set ok [ 0.442642@1] vout: aml_tvout_mode_monitor [ 0.442655@1] vout: aml_vout_probe OK [ 0.443311@1] chip type:0x2b [ 0.443610@1] MEMORY:[0+ed800000] [ 0.443621@1] ramdump_probe, storage device:data [ 0.443627@1] NO valid ramdump args:0 0 [ 0.443643@1] ramdump_probe, set sticky to 8ed8 [ 0.443799@1] Advanced Linux Sound Architecture Driver Initialized. [ 0.444690@1] NetLabel: Initializing [ 0.444702@1] NetLabel: domain hash size = 128 [ 0.444708@1] NetLabel: protocols = UNLABELED CIPSOv4 [ 0.444751@1] NetLabel: unlabeled traffic allowed by default [ 0.446070@1] clocksource: Switched to clocksource arch_sys_counter [ 0.496628@2] VFS: Disk quotas dquot_6.6.0 [ 0.496710@2] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes) [ 0.496932@2] AppArmor: AppArmor Filesystem Enabled [ 0.508544@3] NET: Registered protocol family 2 [ 0.509178@3] TCP established hash table entries: 32768 (order: 6, 262144 bytes) [ 0.509398@3] TCP bind hash table entries: 32768 (order: 7, 524288 bytes) [ 0.509881@3] TCP: Hash tables configured (established 32768 bind 32768) [ 0.509992@3] UDP hash table entries: 2048 (order: 4, 65536 bytes) [ 0.510056@3] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes) [ 0.510411@3] NET: Registered protocol family 1 [ 0.512059@3] Unpacking initramfs... [ 0.829915@2] Freeing initrd memory: 7816K [ 0.841582@3] hw perfevents: clusterb_enabled = 0 [ 0.841605@3] hw perfevents: cpumasks 0xf, 0x0 [ 0.841642@3] hw perfevents: cluster A irq = 18 [ 0.841734@3] hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 counters available [ 0.844970@3] audit: initializing netlink subsys (disabled) [ 0.845053@3] audit: type=2000 audit(0.796:1): initialized [ 0.846132@3] workingset: timestamp_bits=46 max_order=20 bucket_order=0 [ 0.855444@0] Registering sdcardfs 0.1 [ 0.861170@3] NET: Registered protocol family 38 [ 0.861198@3] Key type asymmetric registered [ 0.861206@3] Asymmetric key parser 'x509' registered [ 0.861466@3] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243) [ 0.861482@3] io scheduler noop registered (default) [ 0.861491@3] io scheduler deadline registered [ 0.861658@3] io scheduler cfq registered [ 0.863887@3] meson-pwm ff802000.pwm: pwm pinmux : can't get pinctrl [ 0.864957@2] random: fast init done [ 0.865009@2] random: crng init done [ 0.865392@0] gpiomem-aml ff634000.gpiomem: Initialised: GPIO register area is 2 [ 0.865630@3] gpiomem-aml ff634000.gpiomem: Initialised: Registers at start:0xff634000 end:0xff634fff size:0x00000fff [ 0.865644@3] gpiomem-aml ff634000.gpiomem: Initialised: Registers at start:0xff800000 end:0xff800fff size:0x00000fff [ 0.865793@3] [drm] Initialized [ 0.865914@3] mali ffe40000.bifrost: Continuing without Mali regulator control [ 0.866042@3] mali ffe40000.bifrost: max pp is 2 [ 0.866053@3] mali ffe40000.bifrost: set min pp to default 1 [ 0.866173@3] mali ffe40000.bifrost: min pp is 1 [ 0.866184@3] mali ffe40000.bifrost: min clk is 4 [ 0.866213@3] mali ffe40000.bifrost: hiu io source 0xffffff80084d9000 [ 0.866226@3] mali ffe40000.bifrost: hiu io source 0xffffff80084db000 [ 0.866235@3] mali ffe40000.bifrost: num of pp used most of time 1 [ 0.866243@3] mali ffe40000.bifrost: clock dvfs cfg table size is 6 [ 0.866391@3] mali ffe40000.bifrost: max clk set 4 [ 0.866399@3] mali ffe40000.bifrost: max clk is 4 [ 0.866408@3] mali ffe40000.bifrost: turbo clk set to 5 [ 0.866415@3] mali ffe40000.bifrost: turbo clk is 5 [ 0.866423@3] mali ffe40000.bifrost: default clk set to 4 [ 0.866430@3] mali ffe40000.bifrost: default clk is 4 [ 0.866441@3] mali ffe40000.bifrost: ====================0==================== [ 0.866441@3] clk_freq= 285714285, clk_parent=fclk_div7, voltage=1150, keep_count=5, threshod=<100 190>, clk_sample=285 [ 0.866453@3] mali ffe40000.bifrost: ====================1==================== [ 0.866453@3] clk_freq= 400000000, clk_parent=fclk_div5, voltage=1150, keep_count=5, threshod=<152 207>, clk_sample=400 [ 0.866465@3] mali ffe40000.bifrost: ====================2==================== [ 0.866465@3] clk_freq= 500000000, clk_parent=fclk_div4, voltage=1150, keep_count=5, threshod=<180 220>, clk_sample=500 [ 0.866477@3] mali ffe40000.bifrost: ====================3==================== [ 0.866477@3] clk_freq= 666666666, clk_parent=fclk_div3, voltage=1150, keep_count=5, threshod=<210 236>, clk_sample=666 [ 0.866489@3] mali ffe40000.bifrost: ====================4==================== [ 0.866489@3] clk_freq= 846000000, clk_parent= gp0_pll, voltage=1150, keep_count=5, threshod=<230 255>, clk_sample=846 [ 0.866501@3] mali ffe40000.bifrost: ====================5==================== [ 0.866501@3] clk_freq= 846000000, clk_parent= gp0_pll, voltage=1150, keep_count=5, threshod=<230 255>, clk_sample=846 [ 0.866511@3] mali ffe40000.bifrost: clock dvfs table size is 6 [ 0.868023@3] mali_plat=ffffff800a6cabd0 [ 0.868235@3] meson_gcooldev is null, no set min status [ 0.868245@3] gpu cooling register okay with err=0 [ 0.868326@3] meson_gcooldev is null, no set min status [ 0.868336@3] gpu core cooling register okay with err=0 [ 0.868372@3] shader_present=1, tiler_present=1, l2_present=1 [ 0.868457@3] Mali_pwr_on:gpu_irq : 200 [ 0.868755@3] mali ffe40000.bifrost: GPU identified as 0x3 arch 7.0.9 r0p0 status 0 [ 0.870290@0] mali ffe40000.bifrost: Probed as mali0 [ 0.871031@0] Unable to detect cache hierarchy for CPU 0 [ 0.877202@0] loop: module loaded [ 0.877762@0] mtdoops: mtd device (mtddev=name/number) must be supplied [ 0.878412@0] libphy: Fixed MDIO Bus: probed [ 0.879261@0] REG0:Addr = ffffff80084f1540 [ 0.879286@0] ee eth reset:Addr = ffffff80084f3008 [ 0.879300@0] read auto_cali_idx fail [ 0.879310@0] Not set cali_val for REG1 [ 0.879933@2] meson6-dwmac ff3f0000.ethernet: no reset control found [ 0.879950@2] stmmac - user ID: 0x11, Synopsys ID: 0x37 [ 0.879956@2] Ring mode enabled [ 0.879963@2] DMA HW capability register supported [ 0.879970@2] Normal descriptors [ 0.879977@2] RX Checksum Offload Engine supported [ 0.879982@2] COE Type 2 [ 0.879988@2] TX Checksum insertion supported [ 0.879993@2] Wake-Up On Lan supported [ 0.880046@2] eth%d: device MAC address 00:1e:06:48:0f:ab [ 0.880054@2] Enable RX Mitigation via HW Watchdog Timer [ 0.900785@3] libphy: stmmac: probed [ 0.900813@3] eth%d: PHY ID 001cc916 at 0 IRQ POLL (stmmac-0:00) active [ 0.900821@3] eth%d: PHY ID 001cc916 at 7 IRQ POLL (stmmac-0:07) [ 0.902782@3] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver [ 0.902804@3] ehci-pci: EHCI PCI platform driver [ 0.902916@3] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver [ 0.903408@3] usbcore: registered new interface driver cdc_acm [ 0.903420@3] cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters [ 0.903491@3] usbcore: registered new interface driver usb-storage [ 0.903616@3] usbcore: registered new interface driver usbserial [ 0.903677@3] usbcore: registered new interface driver usbserial_generic [ 0.903728@3] usbserial: USB Serial support registered for generic [ 0.904224@2] mousedev: PS/2 mouse device common for all mice [ 0.904635@0] i2c /dev entries driver [ 0.906724@0] lirc_helper: wakeupkey 0xffffffff, protocol 0x1 [ 0.907276@0] device-mapper: uevent: version 1.0.3 [ 0.907665@3] device-mapper: ioctl: 4.35.0-ioctl (2016-06-23) initialised: dm-devel@redhat.com [ 0.909620@3] ledtrig-cpu: registered to indicate activity on CPUs [ 0.910097@3] hidraw: raw HID events driver (C) Jiri Kosina [ 0.910524@3] usbcore: registered new interface driver usbhid [ 0.910536@3] usbhid: USB HID core driver [ 0.911461@3] value of voltage_tolerance 0 [ 0.911475@3] meson_cpufreq_init:don't find the node [ 0.911481@3] value of gp1_clk_target 0 [ 0.912443@3] dvfs [meson_cpufreq_init] - cluster 0 freq 1908000 [ 0.912453@3] dvfs [meson_cpufreq_init] - cluster 0 freq 2016000 [ 0.912460@3] dvfs [meson_cpufreq_init] - cluster 0 freq 2100000 [ 0.912481@3] cpu cpu0: meson_cpufreq_init: CPU 0 initialized [ 0.914842@3] ff803000.serial: clock gate not found [ 0.914908@3] meson_uart ff803000.serial: ==uart0 reg addr = ffffff80084f9000 [ 0.914954@3] ff803000.serial: ttyS0 at MMIO 0xff803000 (irq = 31, base_baud = 1500000) is a meson_uart [ 0.914979@3] meson_uart ff803000.serial: ttyS0 use xtal(24M) 24000000 change 0 to 115200 [ 1.149426@1] clear:c4c00000, free:c4c00000, tick:673323 us [ 2.858952@3] console [ttyS0] enabled [ 2.863306@3] meson_uart ffd24000.serial: ==uart1 reg addr = ffffff80084fb000 [ 2.869723@3] ffd24000.serial: ttyS1 at MMIO 0xffd24000 (irq = 42, base_baud = 1500000) is a meson_uart [ 2.879922@3] amlogic-new-usb2-v2 ffe09000.usb2phy: USB2 phy probe:phy_mem:0xffe09000, iomap phy_base:0xffffff80084fd000 [ 2.890491@3] amlogic-new-usb3-v2 ffe09080.usb3phy: USB3 phy probe:phy_mem:0xffe09080, iomap phy_base:0xffffff800862b080 [ 2.902273@3] aml_dma ff63e000.aml_dma: Aml dma [ 2.906041@3] aml_aes_dma ff63e000.aml_dma:aml_aes: Aml AES_dma [ 2.911831@3] aml_sha_dma ff63e000.aml_dma:aml_sha: Aml SHA1/SHA224/SHA256 dma [ 2.918479@3] gpio-keypad: probe of ff800000.gpio_keypad failed with error -22 [ 2.925783@3] efusekeynum: 1 [ 2.928383@3] efusekeyname: uuid offset: 0 size: 32 [ 2.934940@3] efuse efuse: probe OK! [ 2.939736@0] ion_dev soc:ion_dev: assigned reserved memory node linux,ion-dev [ 2.945930@0] ge2d: ge2d_init_module [ 2.949268@0] ge2d: ge2d_dev major:236 [ 2.953010@0] ge2d: clock source clk_ge2d_gate ffffffc05eac3ec0 [ 2.958724@0] ge2d: clock clk_ge2d source ffffffc05eac3f40 [ 2.964210@0] ge2d: clock source clk_vapb_0 ffffffc05eac3480 [ 2.969788@0] ge2d: ge2d init clock is 500000000 HZ, VPU clock is 666666656 HZ [ 2.977083@0] ge2d: ge2d clock is 499 MHZ [ 2.980981@0] ge2d: find address resource [ 2.984967@0] ge2d: map io source 0x00000000ff940000,size=65536 to 0xffffff8008690000 [ 2.992758@0] ge2d: reserved mem init failed [ 2.996998@0] ge2d: ge2d: pdev=ffffffc0ca1c9800, irq=47, clk=ffffffc05eac3ec0 [ 3.004144@0] ge2d: ge2d start monitor [ 3.007902@1] ge2d: ge2d workqueue monitor start [ 3.008195@0] [tsync_pcr_init]init success. [ 3.008370@0] amvideom vsync irq: 48 [ 3.008391@0] create_ge2d_work_queue video task ok [ 3.008896@0] fb: osd_init_module [ 3.009256@0] fb: viu vsync irq: 48 [ 3.009264@0] fb: viu2 vsync irq: 64 [ 3.009339@0] 0x000000db:Y=db,U=0,V=0 [ 3.009340@0] 0x000000dc:Y=dc,U=0,V=0 [ 3.009341@0] 0x000000dd:Y=dd,U=0,V=0 [ 3.009342@0] 0x000000de:Y=de,U=0,V=0 [ 3.009343@0] 0x000000df:Y=df,U=0,V=0 [ 3.009344@0] 0x000000e0:Y=e0,U=0,V=0 [ 3.012566@0] fb: osd_rdma_init: rdma_table p=0xcf608000,op=0xcf608000 , v=0xffffff8008637000 [ 3.012594@0] rdma_register, rdma_table_addr ffffff8008639000 rdma_table_addr_phy cf609000 reg_buf ffffffc0ca2e3000 [ 3.012596@0] rdma_register success, handle 2 table_size 4096 [ 3.012598@0] fb: osd_rdma_init:osd rdma handle = 2. [ 3.012607@0] fb: mem_size: 0x800000 [ 3.012608@0] fb: mem_size: 0x4b80000 [ 3.012609@0] fb: mem_size: 0x100000 [ 3.012609@0] fb: mem_size: 0x100000 [ 3.012610@0] fb: mem_size: 0x800000 [ 3.012613@0] fb: failed to init reserved memory [ 3.012622@0] fb: fb def : 1920 1080 1920 2160 32 [ 3.012623@0] fb: init fbdev bpp is:32 [ 3.117483@2] fb: malloc_osd_memory, cma:ffffff800a8aeb58 [ 3.117487@2] fb: malloc_osd_memory, 1231, base:0x00000000cf400000, size:8388608 [ 3.117505@2] fb: use ion buffer for fb memory, fb_index=0 [ 3.117507@2] fb: OSD0 as afbcd mode,afbc_type=2 [ 3.138001@2] meson-fb meson-fb: create ion_client ffffffc05e872c00, handle=ffffffc0ca09b980 [ 3.138006@2] meson-fb meson-fb: ion memory(0): created fb at 0x00000000e5800000, size 75 MiB [ 3.138009@2] fb: 0, phy: 0x00000000e5800000, vir:0xffffff800a95a000, size=77312K [ 3.138009@2] [ 3.138013@2] fb: Frame buffer memory assigned at [ 3.138013@2] fb: 0, phy: 0x00000000e5800000, vir:0xffffff800a95a000, size=77312K [ 3.138013@2] [ 3.138015@2] fb: 0, phy: 0x00000000e5800000, vir:0xffffff800a95a000, size=77312K [ 3.138015@2] [ 3.138016@2] fb: logo_index=0,fb_index=0 [ 3.138018@2] fb: ---------------clear fb0 memory ffffff800a95a000 [ 3.153978@2] fb: osd[0] canvas.idx =0x40 [ 3.153979@2] fb: osd[0] canvas.addr=0xe5800000 [ 3.153981@2] fb: osd[0] canvas.width=7680 [ 3.153982@2] fb: osd[0] canvas.height=2160 [ 3.153982@2] fb: osd[0] frame.width=1920 [ 3.153983@2] fb: osd[0] frame.height=1080 [ 3.153985@2] fb: osd[0] out_addr_id =0x1 [ 3.195677@2] Console: switching to colour frame buffer device 240x67 [ 3.331010@2] fb: osd[0] enable: 1 (swapper/0) [ 3.348505@2] fb: set osd0 reverse as NONE [ 3.364368@2] fb: osd probe OK [ 3.364480@2] hdmitx: hdcp: hdmitx_hdcp_init [ 3.366567@2] vout: vout2: create vout2 attribute OK [ 3.371088@2] vout: vout2: vout2_fops_create OK [ 3.375685@2] vout: vout2: clktree_init [ 3.379298@2] vout: vout2: register server: nulldisp_vout2_server [ 3.385454@2] vout: vout2: init mode null set ok [ 3.389957@2] vout: vout2: aml_vout2_probe OK [ 3.394404@2] DI: di_module_init ok. [ 3.398003@2] DI: di_probe: [ 3.400619@2] DI: di_probe: major 510 [ 3.404923@2] deinterlace deinterlace: assigned reserved memory node linux,di_cma [ 3.411719@2] di:flag_cma=1 [ 3.414487@2] DI: CMA size 0x2800000. [ 3.418136@2] pre_irq:62 [ 3.420628@2] post_irq:63 [ 3.423240@2] DI: di_probe allocate rdma channel 0. [ 3.428091@2] di_get_vpu_clkb: get clk vpu error. [ 3.432772@2] DI: vpu clkb <334000000, 667000000> [ 3.437488@2] get clkb rate:333333328 [ 3.441097@2] DI:enable vpu clkb. [ 3.444387@2] 0x000000e1:Y=e1,U=0,V=0 [ 3.448026@2] 0x000000e2:Y=e2,U=0,V=0 [ 3.451661@2] 0x000000e3:Y=e3,U=0,V=0 [ 3.455299@2] 0x000000f0:Y=f0,U=0,V=0 [ 3.458938@2] 0x000000f1:Y=f1,U=0,V=0 [ 3.462579@2] 0x000000f2:Y=f2,U=0,V=0 [ 3.466219@2] 0x000000f3:Y=f3,U=0,V=0 [ 3.469850@2] 0x000000f4:Y=f4,U=0,V=0 [ 3.473498@2] 0x000000f5:Y=f5,U=0,V=0 [ 3.477138@2] 0x000000f6:Y=f6,U=0,V=0 [ 3.480780@2] 0x000000f7:Y=f7,U=0,V=0 [ 3.484419@2] 0x000000f8:Y=f8,U=0,V=0 [ 3.488058@2] 0x000000f9:Y=f9,U=0,V=0 [ 3.491698@2] 0x000000fa:Y=fa,U=0,V=0 [ 3.495338@2] 0x000000fb:Y=fb,U=0,V=0 [ 3.498981@2] 0x000000fc:Y=fc,U=0,V=0 [ 3.502620@2] 0x000000fd:Y=fd,U=0,V=0 [ 3.506259@2] 0x000000fe:Y=fe,U=0,V=0 [ 3.509891@2] 0x000000ff:Y=ff,U=0,V=0 [ 3.513538@2] 0x0000003a:Y=3a,U=0,V=0 [ 3.517178@2] 0x0000003b:Y=3b,U=0,V=0 [ 3.520819@2] 0x0000003c:Y=3c,U=0,V=0 [ 3.524459@2] 0x0000003d:Y=3d,U=0,V=0 [ 3.528099@2] 0x0000003e:Y=3e,U=0,V=0 [ 3.531737@2] 0x0000003f:Y=3f,U=0,V=0 [ 3.535379@2] DI: support multi decoding 61~62~63. [ 3.540267@2] DI: di_probe:Di use HRTIMER [ 3.544534@2] DI: di_probe:ok [ 3.547156@2] dim:dim_module_init [ 3.550638@2] dim:dim_module_init finish [ 3.554278@2] dil:dil_init. [ 3.557177@2] dil:dil_init ok. [ 3.560111@2] vdin_drv_init: major 509 [ 3.563963@2] vdin_drv_init: vdin driver init done [ 3.568581@2] [viuin..]viuin_init_module viuin module init [ 3.574292@2] [viuin..]viuin_probe probe ok. [ 3.578631@2] [RX]-hdmirx: hdmirx_init. [ 3.582114@2] ESM HLD: Initializing... [ 3.586602@2] amlvid:info: amlvideo_init called[ 3.590166@2] amlvid:info: amlvideo_create_instance called [ 3.595636@2] amlvid:info: v4l2_dev.name=:amlvideo-000 [ 3.600881@2] amlvideo-000: V4L2 device registered as video10 [ 3.606457@2] amlvid:info: amlvideo_create_instance called [ 3.611917@2] amlvid:info: v4l2_dev.name=:amlvideo-001 [ 3.617128@2] amlvideo-001: V4L2 device registered as video23 [ 3.622940@2] PPMGRDRV: warn: ppmgr module init func called [ 3.628419@2] PPMGRDRV: info: ppmgr_driver_probe called [ 3.633559@2] Reserved memory: failed to init DMA memory pool at 0x00000000ed800000, size 0 MiB [ 3.642177@2] PPMGRDRV: info: ppmgr_dev major:507 [ 3.647893@2] ionvideo-000: V4L2 device registered as video13 [ 3.652689@2] ionvideo-001: V4L2 device registered as video14 [ 3.658375@2] ionvideo-002: V4L2 device registered as video15 [ 3.664101@2] ionvideo-003: V4L2 device registered as video16 [ 3.669812@2] ionvideo-004: V4L2 device registered as video17 [ 3.675543@2] ionvideo-005: V4L2 device registered as video18 [ 3.681251@2] ionvideo-006: V4L2 device registered as video19 [ 3.686985@2] ionvideo-007: V4L2 device registered as video20 [ 3.692695@2] ionvideo-008: V4L2 device registered as video21 [ 3.698323@2] ionvid: info: Video Technology Magazine Ion Video [ 3.704214@2] ionvid: info: Capture Board ver 1.0 successfully loaded [ 3.711061@2] videosync_create_instance dev_s ffffffc05eb00c00,dev_s->dev ffffffc0ca0df900 [ 3.718864@2] videosync_create_instance reg videosync.0 [ 3.724138@2] aml_vecm_init:module init [ 3.724142@3] videosync_thread started [ 3.731828@2] [ 3.731828@2] VECM probe start [ 3.736594@2] Can't find detect_colorbar. [ 3.740454@2] Can't find detect_face. [ 3.744161@2] Can't find detect_corn. [ 3.747893@2] Can't find wb_sel. [ 3.751187@2] hdr:Can't find cfg_en_osd_100. [ 3.755521@2] amlogic, vecm[ 3.758114@2] vlock dt support: 1 [ 3.761407@2] vlock dt new_fsm: 0 [ 3.764704@2] vlock dt hwver: 0 [ 3.767821@2] vlock dt phlock_en: 0 [ 3.771300@2] Can't find vlock_en. [ 3.774777@2] Can't find vlock_mode. [ 3.778401@2] Can't find vlock_pll_m_limit. [ 3.782648@2] Can't find vlock_line_limit. [ 3.786802@2] param_config vlock_en:1 md=0x4 [ 3.791055@2] vlock: maxLine 524,maxPixel 1715 [ 3.795467@2] vlock_status_init vlock_en:1 [ 3.799543@2] aml_vecm_probe: ok [ 3.802822@2] amdolby_vision_init:module init [ 3.807338@2] [ 3.807338@2] amdolby_vision probe start & ver: 20181220 [ 3.814115@2] [ 3.814115@2] cpu_id=2 tvmode=0 [ 3.814514@0] hdmitx: hdmitx_set_drm_pkt: tf=1, cf=1, colormetry=0 [ 3.825270@2] dolby_vision_init_receiver(dvel) [ 3.829536@2] dolby_vision_init_receiver: dvel [ 3.834334@2] amdolby_vision_probe: ok [ 3.837664@2] dovi disable in uboot [ 3.841850@2] meson-mmc: mmc driver version: 3.02, 2017-05-15: New Emmc Host Controller [ 3.849790@2] meson-mmc: >>>>>>>>hostbase ffffff80086bb000, dmode [ 3.855556@2] meson-mmc: actual_clock :400000, HHI_nand: 0x80 [ 3.861015@2] meson-mmc: [meson_mmc_clk_set_rate_v3] after clock: 0x1000033c [ 3.906087@2] meson-mmc: meson_mmc_probe() : success! [ 3.915140@0] meson-mmc: emmc: resp_timeout,vstat:0x9dff0800,virqc:3fff [ 3.915560@2] meson-mmc: >>>>>>>>hostbase ffffff80086c4000, dmode [ 3.915594@2] meson-mmc: gpio_cd = 1ca [ 3.927538@0] meson-mmc: emmc: err: wait for desc write back, bus_fsm:0x7 [ 3.934313@3] meson-mmc: meson_mmc_irq_thread_v3() 653: set 1st retry! [ 3.940817@3] meson-mmc: retry cmd 1 the 3-th time(s) [ 3.946843@0] meson-mmc: emmc: resp_timeout,vstat:0x9dff0800,virqc:3fff [ 3.952411@0] meson-mmc: emmc: err: wait for desc write back, bus_fsm:0x7 [ 3.954091@2] meson-mmc: meson_mmc_probe() : success! [ 3.955850@2] cectx ff80023c.aocec: cec driver date:2019/10/22: finetune ARB rising time [ 3.955850@2] [ 3.956036@2] cectx ff80023c.aocec: compatible:amlogic, aocec-sm1 [ 3.956038@2] cectx ff80023c.aocec: cecb_ver:0x2 [ 3.956040@2] cectx ff80023c.aocec: line_reg:0x1 [ 3.956042@2] cectx ff80023c.aocec: line_bit:0x3 [ 3.956044@2] cectx ff80023c.aocec: ee_to_ao:0x1 [ 3.956142@2] input: cec_input as /devices/virtual/input/input0 [ 3.956240@2] cectx ff80023c.aocec: not find 'port_num' [ 3.956243@2] cectx ff80023c.aocec: using cec:1 [ 3.956269@2] cectx ff80023c.aocec: no hdmirx regs [ 3.956271@2] cectx ff80023c.aocec: no hhi regs [ 3.957533@2] irq cnt:2, a:46, b45 [ 4.026615@3] meson-mmc: retry cmd 1 the 2-th time(s) [ 4.026691@2] cectx ff80023c.aocec: wakeup_reason:0x0 [ 4.026751@2] cectx ff80023c.aocec: cev val1: 0x0;val2: 0x0 [ 4.026754@2] cectx ff80023c.aocec: aml_cec_probe success end [ 4.027016@2] unifykey: storage in base: 0xffffffc005000000 [ 4.027017@2] unifykey: storage out base: 0xffffffc005040000 [ 4.027018@2] unifykey: storage block base: 0xffffffc005080000 [ 4.027019@2] unifykey: probe done! [ 4.027289@2] unifykey: no efuse-version set, use default value: -1 [ 4.027290@2] unifykey: key unify config unifykey-num is 14 [ 4.027335@2] unifykey: key unify fact unifykey-num is 17 [ 4.027340@2] unifykey: unifykey_devno: 1f600000 [ 4.027500@2] unifykey: device unifykeys created ok [ 4.027546@2] unifykey: aml_unifykeys_init done! [ 4.027661@2] meson ts init [ 4.027712@2] tsensor id: 0 [ 4.027839@2] r1p1_tsensor_read valid cnt is 0 [ 4.027853@2] tsensor trim info: 0xfa00001a! [ 4.027855@2] tsensor hireboot: 0xc0ff2a70 [ 4.027985@2] meson ts init [ 4.028003@2] tsensor id: 1 [ 4.028092@2] r1p1_tsensor_read valid cnt is 0 [ 4.028101@2] tsensor trim info: 0xfa0000a1! [ 4.028102@2] tsensor hireboot: 0xc0ff2a20 [ 4.028222@2] audio_dsp: [dsp]register dsp to char divece(257) [ 4.028370@2] amaudio: amaudio: driver amaudio init! [ 4.028653@2] amaudio: amaudio_init - amaudio: driver amaudio succuess! [ 4.029167@2] amlkaraoke init success! [ 4.029286@2] sysled: module init [ 4.029477@2] meson_wdt ffd0f0d0.watchdog: start watchdog [ 4.029479@2] meson_wdt ffd0f0d0.watchdog: creat work queue for watch dog [ 4.029667@2] meson_wdt ffd0f0d0.watchdog: AML Watchdog Timer probed done [ 4.030023@2] amlogic rfkill init [ 4.030391@2] meson-saradc ff809000.saradc: set delay per tick to <1ms> by default. [ 4.030393@2] meson-saradc ff809000.saradc: set ticks per period to <1> by default. [ 4.031221@0] dmc_monitor_probe [ 4.031986@0] atv_demod: aml_atvdemod_init: OK, atv demod version: V2.15. [ 4.032113@0] defendkey ff630218.defendkey: Reserved memory is not enough! [ 4.032122@0] defendkey: probe of ff630218.defendkey failed with error -22 [ 4.034664@0] Error: Driver 'spdif-dit' is already registered, aborting... [ 4.034957@0] asoc debug: aml_audio_controller_probe-130 [ 4.036050@0] hdmitx: audio: aout notify format CT_PCM [ 4.036067@0] aml_spdif_platform_probe, register soc platform [ 4.036514@0] audio-ddr-manager ff660000.audiobus:ddr_manager: 0, irqs toddr 32, frddr 36 [ 4.036527@0] audio-ddr-manager ff660000.audiobus:ddr_manager: 1, irqs toddr 33, frddr 37 [ 4.036539@0] audio-ddr-manager ff660000.audiobus:ddr_manager: 2, irqs toddr 34, frddr 38 [ 4.036551@0] audio-ddr-manager ff660000.audiobus:ddr_manager: 3, irqs toddr 35, frddr 39 [ 4.036969@0] audiolocker_platform_probe [ 4.038027@0] Register vad [ 4.038512@0] aml_dai_spdif_probe [ 4.038862@0] asoc-aml-card odroid_hdmi: dit-hifi <-> SPDIF mapping ok [ 4.039305@2] snd_card_add_kcontrols card:ffffffc0c9800018 [ 4.039314@2] effect_v2 is not init [ 4.039316@2] Failed to add VAD controls [ 4.039325@2] eq/drc v1 function enable [ 4.039328@2] no node audio_effect for eq/drc info! [ 4.039329@2] Failed to add audio effects v1 controls [ 4.039441@2] Netfilter messages via NETLINK v0.30. [ 4.039526@2] Initializing XFRM netlink socket [ 4.039537@2] NET: Registered protocol family 17 [ 4.039559@2] Key type dns_resolver registered [ 4.040260@2] Registered swp emulation handler [ 4.042255@2] Registered cp15_barrier emulation handler [ 4.047922@2] Registered setend emulation handler [ 4.047950@2] disable EAS feature [ 4.053947@2] registered taskstats version 1 [ 4.054160@2] AppArmor: AppArmor sha1 policy hashing enabled [ 4.058805@1] dwc3 ff500000.dwc3: Configuration mismatch. dr_mode forced to host [ 4.061501@1] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller [ 4.061515@1] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1 [ 4.061798@1] xhci-hcd xhci-hcd.0.auto: hcc params 0x0228fe6c hci version 0x110 quirks 0x20010010 [ 4.061830@1] xhci-hcd xhci-hcd.0.auto: irq 22, io mem 0xff500000 [ 4.061965@1] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 [ 4.061969@1] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 4.061971@1] usb usb1: Product: xHCI Host Controller [ 4.061973@1] usb usb1: Manufacturer: Linux 4.9.241-arm64 xhci-hcd [ 4.061975@1] usb usb1: SerialNumber: xhci-hcd.0.auto [ 4.062544@2] hub 1-0:1.0: USB hub found [ 4.062566@2] hub 1-0:1.0: 2 ports detected [ 4.062824@2] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller [ 4.062832@2] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2 [ 4.062885@2] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [ 4.062965@2] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003 [ 4.062968@2] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [ 4.062970@2] usb usb2: Product: xHCI Host Controller [ 4.062972@2] usb usb2: Manufacturer: Linux 4.9.241-arm64 xhci-hcd [ 4.062975@2] usb usb2: SerialNumber: xhci-hcd.0.auto [ 4.063311@0] hub 2-0:1.0: USB hub found [ 4.063332@0] hub 2-0:1.0: 1 port detected [ 4.063759@0] hctosys: unable to open rtc device (rtc0) [ 4.064041@0] dwc_otg: usb0: type: 2 speed: 0, config: 0, dma: 0, id: 0, phy: ffe09000, ctrl: 0 [ 4.158129@2] meson-mmc: card IN [ 4.164582@0] dwc_otg: Core Release: 3.30a [ 4.164586@0] dwc_otg: Setting default values for core params [ 4.164595@0] dwc_otg: curmode: 0, host_only: 0 [ 4.176794@0] dwc_otg: Using Buffer DMA mode [ 4.176798@0] dwc_otg: OTG VER PARAM: 1, OTG VER FLAG: 1 [ 4.176800@0] dwc_otg: Working on port type = SLAVE [ 4.176804@0] dwc_otg: Dedicated Tx FIFOs mode [ 4.178541@0] meson_cdev probe [ 4.178550@0] thermal: read gpupp failed [ 4.178665@0] meson_cdev index: 0 [ 4.178773@0] thermal: read gpupp failed [ 4.178865@0] meson_cdev index: 1 [ 4.178869@0] cpucore_cooling_register, max_cpu_core_num:4 [ 4.179006@0] meson_cdev index: 2 [ 4.179011@0] thermal: read gpupp failed [ 4.179047@0] meson_cdev index: 3 [ 4.179098@0] find tzd id: 0 [ 4.179202@0] find tzd id: 0 [ 4.179236@0] meson_cdev probe done [ 4.179360@0] gxbb_pm: enter meson_pm_probe! [ 4.179372@0] no vddio3v3_en pin [ 4.179373@0] pm-meson aml_pm: Can't get switch_clk81 [ 4.179395@0] gxbb_pm: meson_pm_probe done [ 4.179697@0] ALSA device list: [ 4.179699@0] #0: ODROID-HDMI [ 4.262104@2] meson-mmc: normal card in [ 4.398176@2] meson-mmc: actual_clock :400000, HHI_nand: 0x80 [ 4.398178@2] meson-mmc: [meson_mmc_clk_set_rate_v3] after clock: 0x1000033c [ 4.506082@2] usb 1-1: new high-speed USB device number 2 using xhci-hcd [ 4.518109@2] meson-mmc: actual_clock :400000, HHI_nand: 0x80 [ 4.518112@2] meson-mmc: [meson_mmc_clk_set_rate_v3] after clock: 0x1000033c [ 4.573546@2] meson-aml-mmc ffe05000.sd: divider requested rate 200000000 != actual rate 199999997: ret=0 [ 4.573548@2] meson-mmc: actual_clock :199999997, HHI_nand: 0x80 [ 4.573550@2] meson-mmc: [meson_mmc_clk_set_rate_v3] after clock: 0x10000245 4.684714@1] meson_uart ff803000.serial: ttyS0 use xtal(24M) 24000000 change 115200 to 115200 [ 4.685368@0] meson-mmc: emmc: resp_timeout,vstat:0x9dff0800,virqc:3fff [ 4.685370@0] meson-mmc: emmc: err: wait for desc write back, bus_fsm:0x7 [ 4.685386@0] meson-mmc: retry cmd 1 the 1-th time(s) [ 4.685762@2] usb 1-1: New USB device found, idVendor=2109, idProduct=2817 [ 4.685765@2] usb 1-1: New USB device strings: Mfr=1, Product=2, SerialNumber=0 [ 4.685768@2] usb 1-1: Product: USB2.0 Hub [ 4.685770@2] usb 1-1: Manufacturer: VIA Labs, Inc. [ 4.686380@0] meson-mmc: emmc: resp_timeout,vstat:0x9dff0800,virqc:3fff [ 4.686382@0] meson-mmc: emmc: err: wait for desc write back, bus_fsm:0x7 [ 4.686395@0] meson-mmc: Command retried failed line:675, cmd:1 [ 4.693912@2] meson-mmc: sd: adj_win: < 0 1 2 3 4 > [ 4.693915@2] meson-mmc: _aml_sd_emmc_execute_tuning() d1_dly 0, window start 0, size 5 [ 4.693918@2] meson-mmc: sd: clk 199999997 tuning start [ 4.700050@2] meson-mmc: sd: adj_win: < 0 1 2 3 4 > [ 4.700052@2] meson-mmc: _aml_sd_emmc_execute_tuning() d1_dly 1, window start 0, size 5 [ 4.700054@2] meson-mmc: sd: clk 199999997 tuning start [ 4.703151@2] hub 1-1:1.0: USB hub found [ 4.703240@2] hub 1-1:1.0: 4 ports detected [ 4.706522@2] meson-mmc: sd: adj_win: < 0 1 2 3 4 > [ 4.706525@2] meson-mmc: _aml_sd_emmc_execute_tuning() d1_dly 2, window start 0, size 5 [ 4.706528@2] meson-mmc: sd: clk 199999997 tuning start [ 4.712740@2] meson-mmc: sd: adj_win: < 0 1 2 3 4 > [ 4.712741@2] meson-mmc: _aml_sd_emmc_execute_tuning() d1_dly 3, window start 0, size 5 [ 4.712744@2] meson-mmc: sd: clk 199999997 tuning start [ 4.719073@2] meson-mmc: sd: adj_win: < 0 1 2 3 4 > [ 4.719074@2] meson-mmc: _aml_sd_emmc_execute_tuning() d1_dly 4, window start 0, size 5 [ 4.719076@2] meson-mmc: sd: clk 199999997 tuning start [ 4.724474@2] meson-mmc: sd: adj_win: < 0 1 2 4 > [ 4.724477@2] meson-mmc: sd: best_win_start =4, best_win_size =4 [ 4.724479@2] meson-mmc: sd: sd_emmc_regs->gclock=0x10000245,sd_emmc_regs->gadjust=0x12000 [ 4.724481@2] meson-mmc: delay1:0x0, delay2:0x0 [ 4.724493@2] sd: new ultra high speed SDR104 SDHC card at address 59b4 [ 4.724883@2] sd: clock 199999997, 4-bit-bus-width [ 4.724883@2] [ 4.724884@2] mmcblk1: sd:59b4 SDU1 14.8 GiB [ 4.725717@2] mmcblk1: p1 p2 [ 4.893595@1] Freeing unused kernel memory: 4992K Loading, please wait... Starting version 241 [ 4.954663@0] usb 2-1: new SuperSpeed USB device number 2 using xhci-hcd [ 4.977485@0] usb 2-1: New USB device found, idVendor=2109, idProduct=0817 [ 4.978752@0] usb 2-1: New USB device strings: Mfr=1, Product=2, SerialNumber=0 [ 4.986143@0] usb 2-1: Product: USB3.0 Hub [ 4.991244@0] usb 2-1: Manufacturer: VIA Labs, Inc. [ 5.007441@0] hub 2-1:1.0: USB hub found [ 5.007668@0] hub 2-1:1.0: 4 ports detected Begin: Loading essential drivers ... done. Begin: Running /scripts/init-premount ... done. Begin: Mounting root file system ... Begin: Running /scripts/local-top ... done. Begin: Running /scripts/local-premount ... done. Begin: Will now check root file system ... fsck from util-linux 2.33.1 [/sbin/fsck.ext4 (1) -- /dev/mmcblk1p2] fsck.ext4 -y -C0 /dev/mmcblk1p2 e2fsck 1.44.5 (15-Dec-2018) rootfs: clean, 40929/49152 files, 171462/196608 blocks done. [ 5.326387@1] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null) done. Begin: Running /scripts/local-bottom ... done. Begin: Running /scripts/init-bottom ... done. [ 5.585426@2] systemd[1]: System time before build time, advancing clock. [ 5.653356@2] NET: Registered protocol family 10 [ 5.663397@2] ip_tables: (C) 2000-2006 Netfilter Core Team [ 5.667508@2] cgroup: cgroup2: unknown option "nsdelegate" [ 5.677171@2] systemd[1]: systemd 241 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +SECCOMP +BLKID +ELFUTILS +KMOD -IDN2 +IDN -PCRE2 default-hierarchy=hybrid) [ 5.693923@0] systemd[1]: Detected architecture arm64. Welcome to Debian GNU/Linux 10 (buster)! [ 5.718702@2] systemd[1]: Set hostname to . [ 5.833207@1] systemd[1]: File /lib/systemd/system/systemd-journald.service:12 configures an IP firewall (IPAddressDeny=any), but the local system does not support BPF/cgroup based firewalling. [ 5.844837@1] systemd[1]: Proceeding WITHOUT firewalling in effect! (This warning is only shown for the first loaded unit using IP firewalling.) [ 5.970693@1] systemd[1]: Reached target Remote File Systems. [ OK ] Reached target Remote File Systems. [ 5.990589@1] systemd[1]: Listening on Journal Socket (/dev/log). [ OK ] Listening on Journal Socket (/dev/log). [ 6.010544@1] systemd[1]: Listening on Journal Audit Socket. [ OK ] Listening on Journal Audit Socket. [ 6.031345@1] systemd[1]: Created slice User and Session Slice. [ OK ] Created slice User and Session Slice. [ 6.050178@1] systemd[1]: Reached target Slices. [ OK ] Reached target Slices. [ OK ] Listening on udev Kernel Socket. [ OK ] Listening on Syslog Socket. [ OK ] Created slice system-serial\x2dgetty.slice. [ OK ] Started Forward Password R…uests to Wall Directory Watch. [ OK ] Reached target Swap. [ OK ] Listening on initctl Compatibility Named Pipe. [ OK ] Listening on fsck to fsckd communication Socket. [ OK ] Listening on Journal Socket. Starting Load Kernel Modules... Starting Journal Service... Starting Create list of re…odes for the current kernel... Mounting POSIX Message Queue File System... [ OK ] Started Dispatch Password …ts to Console Directory Watch. [ OK ] Reached target Paths. [ OK ] Reached target Local Encrypted Volumes. Mounting Kernel Debug File System... [ OK ] Listening on udev Control Socket. Starting udev Coldplug all Devices... [ OK ] Set up automount Arbitrary…s File System Automount Point. [ OK ] Created slice system-getty.slice. Starting Remount Root and Kernel File Systems... [ OK ] Started Journal Service. [ OK ] Started Load Kernel Modules. [ 6.354147@0] EXT4-fs (mmcblk1p2): re-mounted. Opts: errors=remount-ro,discard [ OK ] Started Create list of req… nodes for the current kernel. [ OK ] Mounted POSIX Message Queue File System. [ OK ] Mounted Kernel Debug File System. [ OK ] Started Remount Root and Kernel File Systems. Starting Create System Users... Starting Load/Save Random Seed... Mounting Kernel Configuration File System... Starting Apply Kernel Variables... Starting Flush Journal to Persistent Storage... [ OK ] Started Create System Users. [ OK ] Started Load/Save Random Seed. [ OK ] Mounted Kernel Configuration File System. [ OK ] Started Apply Kernel Variables. [ OK ] Started udev Coldplug all Devices. Starting Helper to synchronize boot up for ifupdown... Starting Create Static Device Nodes in /dev... [ 6.719464@3] systemd-journald[1985]: Received request to flush runtime journal from PID 1 [ OK ] Started Flush Journal to Persistent Storage. [ OK ] Started Create Static Device Nodes in /dev. Starting udev Kernel Device Manager... [ OK ] Reached target Local File Systems (Pre). [ OK ] Started udev Kernel Device Manager. [ 7.043320@3] register clk_set_setting cpu[43] [ 7.049127@0] Registered firmware driver success. [ 7.050529@0] Try to load video/h264_enc.bin ... [ OK ] Reached target S[ 7.058834@3] load firmware size : 76288, Name : video/h264_enc.bin. [ 7.064496@3] Try to load video/video_ucode.bin ... ound Card. [ 7.111943@0] load firmware size : 1816576, Name : video/video_ucode.bin. [ 7.204678@3] Amlogic A/V streaming port init [ 7.208051@3] get gate demux control ok ffffffc09f8113c0 [ 7.209447@3] get gate parser_top control ok ffffffc09f811480 [ 7.214690@3] get gate vdec control ok ffffffc09f811500 [ 7.219702@3] get gate clk_81 control ok ffffffc09f811580 [ 7.225128@3] get gate clk_vdec_mux control ok ffffffc09f811600 [ 7.230954@3] get gate clk_hcodec_mux control ok ffffffc09f811680 [ 7.237016@3] get gate clk_hevc_mux control ok ffffffc09f811700 [ 7.242915@3] get gate clk_hevcb_mux control ok ffffffc09f811780 [ 7.248858@3] get gate ahbarb0 control ok ffffffc09f811800 [ 7.254302@3] get gate asyncfifo control failed (null) [ OK ] Found device /dev/ttyS0. [ 7.272076@0] decoder registered as /dev/video26 [ 7.275104@1] [0] vcodec_dec decoder [ 7.275317@1] [0] release decoder [ OK ] Started Helper to synchronize boot up for ifupdown. [ OK ] Found device /dev/disk/by-uuid/3086-D853. Mounting /boot... [ OK ] Listening on Load/Save RF …itch Status /dev/rfkill Watch. [ 7.374150@2] FAT-fs (mmcblk1p1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck. [ OK ] Mounted /boot. [ OK ] Reached target Local File Systems. Starting Create Volatile Files and Directories... Starting Raise network interfaces... [ OK ] Started Create Volatile Files and Directories. Starting Network Time Synchronization... Starting Update UTMP about System Boot/Shutdown... [ OK ] Started Update UTMP about System Boot/Shutdown. [ OK ] Started Network Time Synchronization. [ OK ] Reached target System Initialization. [ OK ] Started Da[i l y C7l.e7a1n4u5p0 3o@0] meson6-dwmac ff3f0000.ethernet eth0: fail to init PTP. [ 7.720188@0] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready f Temporary Directories. [ OK ] Listening on D-Bus System Message Bus Socket. [ OK ] Reached target Sockets. [ OK ] Reached target Basic System. [ OK ] Started Regular background program processing daemon. Starting Login Service... [ OK ] Started D-Bus System Message Bus. Starting System Logging Service... Starting WPA supplicant... Starting LSB: Set the CPU …ling governor to "ondemand"... [ OK ] Reached target System Time Synchronized. [ OK ] Started Daily rotation of log files. [ OK ] Started Daily apt download activities. [ OK ] Started Daily apt upgrade and clean activities. [ OK ] Reached target Timers. [ OK ] Started System Logging Service. [ OK ] Started WPA supplicant. [ OK ] Started Login Service. [ 11.402351@1] vout: aml_tvout_mode_work: monitor_timeout [ 11.818380@0] meson6-dwmac ff3f0000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx [ 11.821446@0] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ OK ] Started Raise network interfaces. [ OK ] Reached target Network. Starting OpenBSD Secure Shell server... Starting /etc/rc.local Compatibility... Starting Permit User Sessions... [ 12.958814] rc.local[2144]: setterm: terminal vt220 does not support --blank [ 12.972549] rc.local[2144]: setterm: cannot (un)set powersave mode: Inappropriate ioctl for device [ OK ] Started Permit User Sessions. [ 12.992677] rc.local[2144]: resize2fs 1.44.5 (15-Dec-2018) [ 13.091671@2] EXT4-fs (mmcblk1p2): resizing filesystem from 196608 to 3825405 blocks [ OK ] Started OpenBSD Secure Shell server. [ 13.392375@0] EXT4-fs (mmcblk1p2): resized filesystem to 3825405 [ 13.551625] rc.local[2144]: Filesystem at /dev/mmcblk1p2 is mounted on /; on-line resizing required [ 13.568362] rc.local[2144]: old_desc_blocks = 1, new_desc_blocks = 1 [ 13.584312] [rc.local OK [2144]: ] The filesystem on /dev/mmcblk1p2 is now 3825405 (4k) blocks long.Started /etc/rc.local Compatibility. [ OK ] Started Serial Getty on ttyS0. [ OK ] Started Getty on tty1. [ OK ] Reached target Login Prompts. [ 18.642878@1] meson_uart ff803000.serial: ttyS0 use xtal(24M) 24000000 change 115200 to 115200 Debian GNU/Linux 10 odroid-buster64 ttyS0 eth0: 192.168.0.5 odroid-buster64 login: [ 64.522081@2] fb: mem_free_work, free memory: addr:800000 ```
MichaIng commented 1 year ago

U-Boot 2015.01 (Aug 07 2020 - 08:55:43)

Ah, only mainline kernel but vendor U-Boot it seems.

usual-user commented 1 year ago

OK, had found this fix that was applied to mainline DT but has not yet been incorporated into mainline u-boot. Yes, I dubblechecked that it's really included in my second test build, but it doesn't seem to make any difference. An incorrectly wired IO line for regulator control would have been a good explanation as the cause of the error. Unfortunately, I can't really help under these debugging conditions (no corresponding device for locale investigations) any further. So we have to wait until a mainline solution becomes available. Of course I can then provide a new firmware build as an early adoption.

MichaIng commented 1 year ago

@usual-user Many thanks for all your help and builds. Sooner or later I will have to setup U-Boot and kernel build workflows as well, I guess.

I will ask Hardkernel for developer samples. Not sure if they will still send a C4, but probably an M1 or future SBC ones in pipeline.

Until then or generally, we should bring this up in Odroid forum: https://forum.odroid.com/viewforum.php?f=203

usual-user commented 1 year ago

Many thanks for all your help and builds.

You're welcome. It's also a bit self-serving, it confirms to me that fedora also works out-of-the-box on devices I don't own, as long as there's a firmware that can boot the operating system. And fedora is not even designed for a specific device, but only generically compiled for the aarch64 architecture. So one image fits everyone.

I will ask Hardkernel for developer samples. Not sure if they will still send a C4, but probably an M1 or future SBC ones in pipeline.

This is not a good choice. The HC4 is better, because as I noticed in the meantime, there is a separate odroid-hc4_defconfig with additional storage media enabled. The C4 u-boot should also work on the HC4, but cannot read the boot configuration from the additional storage media offered by the HC4. However, this makes the HC4 suitable for checking the function of both firmwares. The M1 is currently only recommended for developers who want to contribute to mainline support. With kernel 6.2.0-rc1 all code available for the M1 will be available out-of-the-box. Further support code has yet to be written. Userspace support is also available with current mainline releases. The only exception is FFmpeg, where v4l2-request support is still missing. But it's not too bad at the moment, because the rkvdec2 kernel driver is still missing. All in all, the M1 is already very well supported out-of-the-box with a current mainline operating system. Some older devices still need a lot of out-of-tree patches for equivalent support. But when it comes to u-boot, so far only the legacy BSP fork from 2015 is available. TF-A support is progressing slowly. And for u-boot no mainline code has been posted yet. There are only a few incomplete out-of-tree hacks for other rk3568 devices. I'm using an Armbian build as boot trampoline, but as the BSP version gets probably no development and feature backports, no reason to build it myself. So it will take some time, but something is always ;-)

Until then or generally, we should bring this up in Odroid forum

In my experience, Hardkernel doesn't have much interest in mainline contributions and only supports lagacy outdated BSP implementations. But maybe constant dripping hollows the stone? Pine64 does a much better job, at least they document the current mainline support very carefully and I am very grateful to the developers for contributing their code to mainline. Without their work, the support of the Odroid-M1 by simply adding an M1 board DTS would not have been possible. And this was not even led by Hardkernel, but a nice example of what little effort (board DTS) is necessary to support a new device if there is sufficient mainline SOC support.

MichaIng commented 1 year ago

Good point about C4 vs HC4. It has an SPI flash indeed to boot from. We already know the issues with petitboot stored on it by Dee default, which has only limited boot.scr syntax support. The downside of HC4 is that it's headless and hence media features cannot be tested.

Exactly that M1 isn't so well supported yet is a good reason to have the board to test images with while finding proper builds and configs, even without doing own bootloader and kernel builds.

Hardkernel won't help with the U3 SD card issue, but probably someone from the community does 🙂.

usual-user commented 1 year ago

The downside of HC4 is that it's headless and hence media features cannot be tested.

If I don't misread the specification, the HC4 is also equipped with an HDMI port, so what are you missing?

Exactly that M1 isn't so well supported yet is a good reason to have the board to test images with while finding proper builds and configs, even without doing own bootloader and kernel builds.

The bigger problem for Debian based systems is the use of outdated software versions for "stability reasons". The aarch64 SOC architecture is bleeding edge development and cannot be efficiently driven by software designed for the x86 IBM architecture. Users must be willing to learn new things and use others as the familiar ones from the x86 architecture. But who can teach old dogs new tricks. Just look at how desperately they try to emulate a x86 boot schema, although better is possible. For example, there's no need for a boot partion or a /boot directory, this is a x86 BIOS constraint. But they seem to love how it breaks with conflicting file locations every now and then. Or how they want to use hardware video acceleration via the GPU. A WEB browser designed with this in mind will never work efficiently on a SOC architecture with separate VPUs. Yes SOCs can have several VPUs. The rk356x currently lacks rkvdec2 kernel support, but when it becomes available, it will be on par with many other SOCs and ready for the media desktop. But everything else is already possible today with an up-to-date desktop environment.

MichaIng commented 1 year ago

Oh you're right, the HC4 has HDMI, how could I miss that.

While with x86_64, things are indeed still easier IMO in the meantime, aarch64 has established quite well and is taken into account by most software developers. About e.g. GPU usage efficiency I cannot say something, but on modern mid- to high class SBCs Kodi and Chromium alike works quite well and generally an ARM server is overall more efficient compared to an x86_64 machine. However focus of DietPi is anyway a little more on server applications than on GUI applications.