Open Alberto-Relucio opened 8 months ago
Use "ethtool -S eth0" to dump the MIB counters from both sides to verify the host port connection is working properly. In the device tree the speed is set to 100. Is that intentional? I think the current DSA driver cannot handle that situation as it only looks at rgmii-id to configure the switch. The host port XMII control register has 2 bits for MII, RMII, or RGMII mode, then 2 bits for RGMII, RGMII_TX_ID, RGMII_RX_ID, and RGMII_ID mode, then 1 bit for 100/1000 operation. If that 100/1000 bit is needed for correct operation the driver has to manually change to set that bit.
Hi, I´ve tried with 1000 speed and the result is exactly the same. Also rigth now is flashed with 1000 speed. I leave here the ethtool output:
box-ai@tegra-ubuntu:~$ ethtool -S eth0
NIC statistics:
mmc_tx_octetcount_gb: 325974
mmc_tx_framecount_gb: 1848
mmc_tx_broadcastframe_g: 492
mmc_tx_multicastframe_g: 1356
mmc_tx_64_octets_gb: 0
mmc_tx_65_to_127_octets_gb: 1049
mmc_tx_128_to_255_octets_gb: 307
mmc_tx_256_to_511_octets_gb: 492
mmc_tx_512_to_1023_octets_gb: 0
mmc_tx_1024_to_max_octets_gb: 0
mmc_tx_unicast_gb: 0
mmc_tx_multicast_gb: 1356
mmc_tx_broadcast_gb: 492
mmc_tx_underflow_error: 0
mmc_tx_singlecol_g: 0
mmc_tx_multicol_g: 0
mmc_tx_deferred: 0
mmc_tx_latecol: 0
mmc_tx_exesscol: 0
mmc_tx_carrier_error: 0
mmc_tx_octetcount_g: 325974
mmc_tx_framecount_g: 1848
mmc_tx_excessdef: 0
mmc_tx_pause_frame: 0
mmc_tx_vlan_frame_g: 0
mmc_rx_framecount_gb: 18
mmc_rx_octetcount_gb: 1170
mmc_rx_octetcount_g: 1170
mmc_rx_broadcastframe_g: 18
mmc_rx_multicastframe_g: 0
mmc_rx_crc_error: 0
mmc_rx_align_error: 0
mmc_rx_runt_error: 0
mmc_rx_jabber_error: 0
mmc_rx_undersize_g: 0
mmc_rx_oversize_g: 0
mmc_rx_64_octets_gb: 0
mmc_rx_65_to_127_octets_gb: 18
mmc_rx_128_to_255_octets_gb: 0
mmc_rx_256_to_511_octets_gb: 0
mmc_rx_512_to_1023_octets_gb: 0
mmc_rx_1024_to_max_octets_gb: 0
mmc_rx_unicast_g: 0
mmc_rx_length_error: 0
mmc_rx_outofrangetype: 0
mmc_rx_pause_frames: 0
mmc_rx_fifo_overflow: 0
mmc_rx_vlan_frames_gb: 0
mmc_rx_watchdog_error: 0
mmc_rx_receive_error: 0
mmc_rx_ctrl_frames_g: 0
mmc_tx_lpi_usec_cntr: 0
mmc_tx_lpi_tran_cntr: 0
mmc_rx_lpi_usec_cntr: 0
mmc_rx_lpi_tran_cntr: 0
mmc_rx_ipv4_gd: 0
mmc_rx_ipv4_hderr: 0
mmc_rx_ipv4_nopay: 0
mmc_rx_ipv4_frag: 0
mmc_rx_ipv4_udsbl: 0
mmc_rx_ipv6_gd_octets: 0
mmc_rx_ipv6_hderr_octets: 0
mmc_rx_ipv6_nopay_octets: 0
mmc_rx_udp_gd: 0
mmc_rx_udp_err: 0
mmc_rx_tcp_gd: 0
mmc_rx_tcp_err: 0
mmc_rx_icmp_gd: 0
mmc_rx_icmp_err: 0
mmc_rx_ipv4_gd_octets: 0
mmc_rx_ipv4_hderr_octets: 0
mmc_rx_ipv4_nopay_octets: 0
mmc_rx_ipv4_frag_octets: 0
mmc_rx_ipv4_udsbl_octets: 0
mmc_rx_ipv6_gd: 0
mmc_rx_ipv6_hderr: 0
mmc_rx_ipv6_nopay: 0
mmc_rx_udp_gd_octets: 0
mmc_rx_udp_err_octets: 0
mmc_rx_tcp_gd_octets: 0
mmc_rx_tcp_err_octets: 0
mmc_rx_icmp_gd_octets: 0
mmc_rx_icmp_err_octets: 0
mmc_tx_octetcount_gb_h: 0
mmc_tx_framecount_gb_h: 0
mmc_tx_broadcastframe_g_h: 0
mmc_tx_multicastframe_g_h: 0
mmc_tx_64_octets_gb_h: 0
mmc_tx_65_to_127_octets_gb_h: 0
mmc_tx_128_to_255_octets_gb_h: 0
mmc_tx_256_to_511_octets_gb_h: 0
mmc_tx_512_to_1023_octets_gb_h: 0
mmc_tx_1024_to_max_octets_gb_h: 0
mmc_tx_unicast_gb_h: 0
mmc_tx_multicast_gb_h: 0
mmc_tx_broadcast_gb_h: 0
mmc_tx_underflow_error_h: 0
mmc_tx_octetcount_g_h: 0
mmc_tx_framecount_g_h: 0
mmc_tx_pause_frame_h: 0
mmc_tx_vlan_frame_g_h: 0
mmc_rx_framecount_gb_h: 0
mmc_rx_octetcount_gb_h: 0
mmc_rx_octetcount_g_h: 0
mmc_rx_broadcastframe_g_h: 0
mmc_rx_multicastframe_g_h: 0
mmc_rx_crc_error_h: 0
mmc_rx_64_octets_gb_h: 0
mmc_rx_65_to_127_octets_gb_h: 0
mmc_rx_128_to_255_octets_gb_h: 0
mmc_rx_256_to_511_octets_gb_h: 0
mmc_rx_512_to_1023_octets_gb_h: 0
mmc_rx_1024_to_max_octets_gb_h: 0
mmc_rx_unicast_g_h: 0
mmc_rx_length_error_h: 0
mmc_rx_outofrangetype_h: 0
mmc_rx_pause_frames_h: 0
mmc_rx_fifo_overflow_h: 0
mmc_rx_vlan_frames_gb_h: 0
mmc_rx_ipv4_gd_h: 0
mmc_rx_ipv4_hderr_h: 0
mmc_rx_ipv4_nopay_h: 0
mmc_rx_ipv4_frag_h: 0
mmc_rx_ipv4_udsbl_h: 0
mmc_rx_ipv6_gd_octets_h: 0
mmc_rx_ipv6_hderr_octets_h: 0
mmc_rx_ipv6_nopay_octets_h: 0
mmc_rx_udp_gd_h: 0
mmc_rx_udp_err_h: 0
mmc_rx_tcp_gd_h: 0
mmc_rx_tcp_err_h: 0
mmc_rx_icmp_gd_h: 0
mmc_rx_icmp_err_h: 0
mmc_rx_ipv4_gd_octets_h: 0
mmc_rx_ipv4_hderr_octets_h: 0
mmc_rx_ipv4_nopay_octets_h: 0
mmc_rx_ipv4_frag_octets_h: 0
mmc_rx_ipv4_udsbl_octets_h: 0
mmc_rx_ipv6_gd_h: 0
mmc_rx_ipv6_hderr_h: 0
mmc_rx_ipv6_nopay_h: 0
mmc_rx_udp_gd_octets_h: 0
mmc_rx_udp_err_octets_h: 0
mmc_rx_tcp_gd_octets_h: 0
mmc_rx_tcp_err_octets_h: 0
mmc_rx_icmp_gd_octets_h: 0
mmc_rx_icmp_err_octets_h: 0
mmc_tx_fpe_frag_cnt: 0
mmc_tx_fpe_hold_req_cnt: 0
mmc_rx_packet_reass_err_cnt: 0
mmc_rx_packet_smd_err_cnt: 0
mmc_rx_packet_asm_ok_cnt: 0
mmc_rx_fpe_fragment_cnt: 0
re_alloc_rxbuf_failed[0]: 0
re_alloc_rxbuf_failed[1]: 0
re_alloc_rxbuf_failed[2]: 0
re_alloc_rxbuf_failed[3]: 0
re_alloc_rxbuf_failed[4]: 0
re_alloc_rxbuf_failed[5]: 0
re_alloc_rxbuf_failed[6]: 0
re_alloc_rxbuf_failed[7]: 0
re_alloc_rxbuf_failed[8]: 0
re_alloc_rxbuf_failed[9]: 0
tx_proc_stopped_irq_n[0]: 0
tx_proc_stopped_irq_n[1]: 0
tx_proc_stopped_irq_n[2]: 0
tx_proc_stopped_irq_n[3]: 0
tx_proc_stopped_irq_n[4]: 0
tx_proc_stopped_irq_n[5]: 0
tx_proc_stopped_irq_n[6]: 0
tx_proc_stopped_irq_n[7]: 0
tx_proc_stopped_irq_n[8]: 0
tx_proc_stopped_irq_n[9]: 0
rx_proc_stopped_irq_n[0]: 0
rx_proc_stopped_irq_n[1]: 0
rx_proc_stopped_irq_n[2]: 0
rx_proc_stopped_irq_n[3]: 0
rx_proc_stopped_irq_n[4]: 0
rx_proc_stopped_irq_n[5]: 0
rx_proc_stopped_irq_n[6]: 0
rx_proc_stopped_irq_n[7]: 0
rx_proc_stopped_irq_n[8]: 0
rx_proc_stopped_irq_n[9]: 0
tx_buf_unavail_irq_n[0]: 0
tx_buf_unavail_irq_n[1]: 0
tx_buf_unavail_irq_n[2]: 0
tx_buf_unavail_irq_n[3]: 0
tx_buf_unavail_irq_n[4]: 0
tx_buf_unavail_irq_n[5]: 0
tx_buf_unavail_irq_n[6]: 0
tx_buf_unavail_irq_n[7]: 0
tx_buf_unavail_irq_n[8]: 0
tx_buf_unavail_irq_n[9]: 0
rx_buf_unavail_irq_n[0]: 0
rx_buf_unavail_irq_n[1]: 0
rx_buf_unavail_irq_n[2]: 0
rx_buf_unavail_irq_n[3]: 0
rx_buf_unavail_irq_n[4]: 0
rx_buf_unavail_irq_n[5]: 0
rx_buf_unavail_irq_n[6]: 0
rx_buf_unavail_irq_n[7]: 0
rx_buf_unavail_irq_n[8]: 0
rx_buf_unavail_irq_n[9]: 0
rx_watchdog_irq_n: 0
fatal_bus_error_irq_n: 0
tx_normal_irq_n[0]: 0
tx_normal_irq_n[1]: 0
tx_normal_irq_n[2]: 0
tx_normal_irq_n[3]: 0
tx_normal_irq_n[4]: 0
tx_normal_irq_n[5]: 0
tx_normal_irq_n[6]: 0
tx_normal_irq_n[7]: 0
tx_normal_irq_n[8]: 0
tx_normal_irq_n[9]: 0
tx_usecs_swtimer_n[0]: 926
tx_usecs_swtimer_n[1]: 700
tx_usecs_swtimer_n[2]: 0
tx_usecs_swtimer_n[3]: 0
tx_usecs_swtimer_n[4]: 0
tx_usecs_swtimer_n[5]: 0
tx_usecs_swtimer_n[6]: 0
tx_usecs_swtimer_n[7]: 0
tx_usecs_swtimer_n[8]: 0
tx_usecs_swtimer_n[9]: 0
rx_normal_irq_n[0]: 0
rx_normal_irq_n[1]: 0
rx_normal_irq_n[2]: 0
rx_normal_irq_n[3]: 0
rx_normal_irq_n[4]: 0
rx_normal_irq_n[5]: 0
rx_normal_irq_n[6]: 0
rx_normal_irq_n[7]: 0
rx_normal_irq_n[8]: 0
rx_normal_irq_n[9]: 0
link_disconnect_count: 0
link_connect_count: 1
ts_lock_add_fail: 0
ts_lock_del_fail: 0
mgbe_ip_header_err: 0
mgbe_jabber_timeout_err: 0
mgbe_payload_cs_err: 0
mgbe_tx_underflow_err: 0
tx_clean_n[0]: 1150
tx_clean_n[1]: 845
tx_clean_n[2]: 0
tx_clean_n[3]: 0
tx_clean_n[4]: 0
tx_clean_n[5]: 0
tx_clean_n[6]: 0
tx_clean_n[7]: 0
tx_clean_n[8]: 0
tx_clean_n[9]: 0
tx_pkt_n: 1848
rx_pkt_n: 18
tx_vlan_pkt_n: 0
rx_vlan_pkt_n: 0
tx_tso_pkt_n: 0
q_tx_pkt_n[0]: 1123
q_tx_pkt_n[1]: 725
q_tx_pkt_n[2]: 0
q_tx_pkt_n[3]: 0
q_tx_pkt_n[4]: 0
q_tx_pkt_n[5]: 0
q_tx_pkt_n[6]: 0
q_tx_pkt_n[7]: 0
q_tx_pkt_n[8]: 0
q_tx_pkt_n[9]: 0
q_rx_pkt_n[0]: 0
q_rx_pkt_n[1]: 18
q_rx_pkt_n[2]: 0
q_rx_pkt_n[3]: 0
q_rx_pkt_n[4]: 0
q_rx_pkt_n[5]: 0
q_rx_pkt_n[6]: 0
q_rx_pkt_n[7]: 0
q_rx_pkt_n[8]: 0
q_rx_pkt_n[9]: 0
ip_header_error: 0
jabber_timeout_error: 0
pkt_flush_error: 0
payload_cs_error: 0
loss_of_carrier_error: 0
no_carrier_error: 0
late_collision_error: 0
excessive_collision_error: 0
excessive_deferal_error: 0
underflow_error: 0
rx_crc_error: 0
rx_frame_error: 0
clear_tx_err: 0
clear_rx_err: 0
const_gate_ctr_err: 0
head_of_line_blk_sch: 0
hlbs_q[0]: 0
hlbs_q[1]: 0
hlbs_q[2]: 0
hlbs_q[3]: 0
hlbs_q[4]: 0
hlbs_q[5]: 0
hlbs_q[6]: 0
hlbs_q[7]: 0
head_of_line_blk_frm: 0
hlbf_q[0]: 0
hlbf_q[1]: 0
hlbf_q[2]: 0
hlbf_q[3]: 0
hlbf_q[4]: 0
hlbf_q[5]: 0
hlbf_q[6]: 0
hlbf_q[7]: 0
base_time_reg_err: 0
sw_own_list_complete: 0
frp_parsed: 0
frp_dropped: 0
frp_err: 0
frp_incomplete: 0
p06_rx_hi: 0
p06_rx_undersize: 0
p06_rx_fragments: 0
p06_rx_oversize: 0
p06_rx_jabbers: 0
p06_rx_symbol_err: 1848
p06_rx_crc_err: 0
p06_rx_align_err: 0
p06_rx_mac_ctrl: 0
p06_rx_pause: 0
p06_rx_bcast: 0
p06_rx_mcast: 0
p06_rx_ucast: 0
p06_rx_64_or_less: 0
p06_rx_65_127: 1049
p06_rx_128_255: 307
p06_rx_256_511: 492
p06_rx_512_1023: 0
p06_rx_1024_1522: 0
p06_rx_1523_2000: 0
p06_rx_2001: 0
p06_tx_hi: 0
p06_tx_late_col: 0
p06_tx_pause: 0
p06_tx_bcast: 18
p06_tx_mcast: 2926
p06_tx_ucast: 0
p06_tx_deferred: 0
p06_tx_total_col: 0
p06_tx_exc_col: 0
p06_tx_single_col: 0
p06_tx_mult_col: 0
p06_rx_total: 327822
p06_tx_total: 931531
p06_rx_discards: 0
p06_tx_discards: 0
This "p06_rx_symbol_err: 1848" means the switch host port cannot receive properly from the MAC. You will need to try other RGMII delay combinations. It is a little weird as typically it is rx_crc_err with these types of connection issues.
Hi, I´ve been trying to read the switch registers via i2c just to asure that the configuration is correctly applied but I´m not able to do it via i2cget, do you know the way to do it properly?
I do not know how i2cget works. The most important thing about using I2C is the register width is 16-bit, so you need to supply 2 as a parameter if one is allowed. The I2C command from U-Boot can be used to access the switch if that function is enabled.
Hi, finally managed to read the registers via i2c and it seems to be confugred in default position (I looked register 0x7301 and the value is 0x08). Knowing this (there is minimum a 1.5ns delay in egress RGMII clock) , how should I configure the delay in MAC side as rxid or txid?
Hi, I have a KSZ9567R connected with Jetson AGX ORIN trough RGMII and i2c. I have modified the .dts as follows:
When I boot the Jetson I can see all the switch interfaces and eth0 is up, but after manually asigning an IP I am not able to ping any device in the network and I can not see the IP when I scan the network.
Here are the dmesg logs that may be concerning: