search

Microchip-MPLAB-Harmony / core

Harmony 3 Core
https://onlinedocs.microchip.com/v2/keyword-lookup?keyword=MH3_core&redirect=true
Other
17 stars 12 forks source link

mpfs.c missed cache handling #5

Closed lucapascarella closed 4 years ago

lucapascarella commented 5 years ago

It may be not a novelty since the problem was present in the previous Harmony version, but I think it is essential to bring attention now.

The mpfs.c misses a cache guard when used together with PIC32MZ and SST26 SQI in DMA or PIO mode. In that configuration, the SQI writes in non-cacheable space and mpfs.c, instead, uses cacheable addresses creating unpredictable behaviors that often prevent even to mount the file system.

Below a temporary fix to that issue acting on the mpfs.c. Fix enabled with _SQI_CACHEWORKAROUND macro.

mpfs.c.zip

dsettu commented 5 years ago

@lucapascarella , Thank you for your feedback, it will be fixed in v3.6 release.

dsettu commented 4 years ago

@lucapascarella , This issue is fixed now. Please check it out and close. thanks.