Microsemi / switchtec-dma

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PM40100 PFX failing with "Paused, a reserved opcode was detected" error under Linux 5.4.x kernel #15

Open girishgoyal opened 2 years ago

girishgoyal commented 2 years ago

I am using PM40100 PFX in a signle partition mode with Management and DMA EP enabled. Here is the firmware info:

switchtec fw-info /dev/switchtec0
Currently Running:
  IMG Version: 3.90 B05B
Active Partitions:
  MAP Version: 3.50 B03E CRC: b6d70695      (Running)            
  BL2 Version: 3.90 B05B CRC: da916f63 (RO)  (Running)            
  IMG Version: 3.90 B05B CRC: 7b865410 (RO)  (Running)            
  CFG Version: 3.90 B05B CRC: 1bd5bdea (RO)  (Running)   

I am trying to use switchtec_dma driver with Linux 5.4.115+ kernel and running into "Paused, a reserved opcode was detected in an SE" error while running dmatest. Here is the dmesg output:

[ 1677.798830] switchtec_dma 0000:18:00.2: Switchtec PSX/PFX DMA EP
[ 1677.799057] switchtec_dma 0000:18:00.2: Channel pause irq vector 0
[ 1677.799201] switchtec_dma 0000:18:00.2: EP SE buffer base 0
[ 1677.799202] switchtec_dma 0000:18:00.2: EP SE buffer count 10
[ 1677.861430] switchtec_dma 0000:18:00.2: Channel 0: SE buffer base 0
[ 1677.861432] switchtec_dma 0000:18:00.2: Channel 0: SE buffer count 10
[ 1677.861448] switchtec_dma 0000:18:00.2: Channel 0: CE irq vector 1
[ 1677.861456] switchtec_dma 0000:18:00.2: WARN: Device release is not defined so it is not safe to unbind this driver while in use
[ 1677.861499] switchtec_dma 0000:18:00.2: Channel count: 1
[ 1677.861500] switchtec_dma 0000:18:00.2: Channel 0: dma8chan0
[ 1677.861508] switchtec_dma 0000:18:00.2: Switchtec DMA Channels Registered
[ 1820.929057] dma dma8chan0: Burst Size:  0x6
[ 1820.929060] dma dma8chan0: Burst Scale: 0x1
[ 1820.929061] dma dma8chan0: Interval:    0x0
[ 1820.929062] dma dma8chan0: Arb Weight:  0x1
[ 1820.929063] dma dma8chan0: MRRS:        0x3
[ 1820.929100] dmatest: Added 1 threads using dma8chan0
[ 1905.328352] dmatest: Started 1 threads using dma8chan0
[ 1905.328544] dma dma8chan0: CID 0x0001 failed, SC 0x00010000
[ 1905.328553] dma dma8chan0: CE DW0: 0x00000000
[ 1905.328554] dma dma8chan0: Paused, a reserved opcode was detected in an SE
[ 1905.328557] dma dma8chan0: CE DW1: 0x00000000
[ 1905.328565] dma dma8chan0: CE DW2: 0x00000000
[ 1905.328567] dma dma8chan0: CE DW3: 0x00000000
[ 1905.328571] dma dma8chan0: CE DW4: 0x00000002
[ 1905.328573] dma dma8chan0: CE DW5: 0x00000000
[ 1905.328575] dma dma8chan0: CE DW6: 0x00010000
[ 1905.328577] dma dma8chan0: CE DW7: 0x00010001
[ 1905.328627] dmatest: dma8chan0-copy0: dstbuf[0x359] not copied! Expected df, got 26
[ 1905.328630] dmatest: dma8chan0-copy0: dstbuf[0x35a] not copied! Expected de, got 25

Is this a known issue? Is there any reason why switchtec_dma won't work with 5.4.x kernel? How can I find out what reserved code the DMA engine is complaining about? Any help will be greatly appreciated. Thanks.

rajeshrimal516 commented 1 year ago

I am using PM40100 PFX in a signle partition mode with Management and DMA EP enabled. Here is the firmware info:

switchtec fw-info /dev/switchtec0
Currently Running:
  IMG Version: 3.90 B05B
Active Partitions:
  MAP Version: 3.50 B03E CRC: b6d70695      (Running)            
  BL2 Version: 3.90 B05B CRC: da916f63 (RO)  (Running)            
  IMG Version: 3.90 B05B CRC: 7b865410 (RO)  (Running)            
  CFG Version: 3.90 B05B CRC: 1bd5bdea (RO)  (Running)   

I am trying to use switchtec_dma driver with Linux 5.4.115+ kernel and running into "Paused, a reserved opcode was detected in an SE" error while running dmatest. Here is the dmesg output:

[ 1677.798830] switchtec_dma 0000:18:00.2: Switchtec PSX/PFX DMA EP
[ 1677.799057] switchtec_dma 0000:18:00.2: Channel pause irq vector 0
[ 1677.799201] switchtec_dma 0000:18:00.2: EP SE buffer base 0
[ 1677.799202] switchtec_dma 0000:18:00.2: EP SE buffer count 10
[ 1677.861430] switchtec_dma 0000:18:00.2: Channel 0: SE buffer base 0
[ 1677.861432] switchtec_dma 0000:18:00.2: Channel 0: SE buffer count 10
[ 1677.861448] switchtec_dma 0000:18:00.2: Channel 0: CE irq vector 1
[ 1677.861456] switchtec_dma 0000:18:00.2: WARN: Device release is not defined so it is not safe to unbind this driver while in use
[ 1677.861499] switchtec_dma 0000:18:00.2: Channel count: 1
[ 1677.861500] switchtec_dma 0000:18:00.2: Channel 0: dma8chan0
[ 1677.861508] switchtec_dma 0000:18:00.2: Switchtec DMA Channels Registered
[ 1820.929057] dma dma8chan0: Burst Size:  0x6
[ 1820.929060] dma dma8chan0: Burst Scale: 0x1
[ 1820.929061] dma dma8chan0: Interval:    0x0
[ 1820.929062] dma dma8chan0: Arb Weight:  0x1
[ 1820.929063] dma dma8chan0: MRRS:        0x3
[ 1820.929100] dmatest: Added 1 threads using dma8chan0
[ 1905.328352] dmatest: Started 1 threads using dma8chan0
[ 1905.328544] dma dma8chan0: CID 0x0001 failed, SC 0x00010000
[ 1905.328553] dma dma8chan0: CE DW0: 0x00000000
[ 1905.328554] dma dma8chan0: Paused, a reserved opcode was detected in an SE
[ 1905.328557] dma dma8chan0: CE DW1: 0x00000000
[ 1905.328565] dma dma8chan0: CE DW2: 0x00000000
[ 1905.328567] dma dma8chan0: CE DW3: 0x00000000
[ 1905.328571] dma dma8chan0: CE DW4: 0x00000002
[ 1905.328573] dma dma8chan0: CE DW5: 0x00000000
[ 1905.328575] dma dma8chan0: CE DW6: 0x00010000
[ 1905.328577] dma dma8chan0: CE DW7: 0x00010001
[ 1905.328627] dmatest: dma8chan0-copy0: dstbuf[0x359] not copied! Expected df, got 26
[ 1905.328630] dmatest: dma8chan0-copy0: dstbuf[0x35a] not copied! Expected de, got 25

Is this a known issue? Is there any reason why switchtec_dma won't work with 5.4.x kernel? How can I find out what reserved code the DMA engine is complaining about? Any help will be greatly appreciated. Thanks.

I also encountered the same error while running in 5.5.x kernel. Is there any fix or did you solve it?

sjrom commented 4 months ago

I am using the 5.4.x kernel + PFX PM4068/PM4028, and got the same complain msg from dmatest. And sure, tested with the latest switchtec-dma source. Has someone any update for this? Any help statement will be greatly appreciated. 3Q

sjrom commented 4 months ago

Interesting clues here. After changing the source of switchtec_dma.c, L3094 from "dma->copy_align = DMAENGINE_ALIGN_1_BYTE;" to "dma->copy_align = DMAENGINE_ALIGN_8_BYTES;". The dmatest could pass now in my environment for 4K~1M test buf size.

The code change idea from the spec. "DWORD alignment for DMA transaction"

But I didn't know it really mapped to the same thing?

Just noted it if this helps.