Closed neoklis closed 7 years ago
The offset you observed really depends on which sampling rate did you select. There is a single master clock (80 MHz) that is driving all the FPGA and ADC operations. No firmware (as in a microcontroller ) is involved there.
So, AFAIK "only" 125 kHz, 250 kHz, 500 kHz, 1 MHz, 1.6 MHz and 2 MHz bandwidths are giving you an exact sampling rate (put aside the unavoidable small xtal offset).
The exact sampling rate can be computed by dividing 80000000 (master clock frequency in Hz) for the nearest integer suitable in order to produce the SR.
E.g. for nominal 48 kHz , it gives 80000000/1666 = 48019.2076831
Thank you Andrea!
Hi
Having written an SDR receiver program that supports Perseus, I have noticed that the sampling rate has an error of ~ +0.158%. I tried as I could to find a bug in my code that might be responsible but haven't found one. This rate error is small but enough to cause e.g. severe slanting of image when receiving WEFAX SSTV and also makes it difficult to sync with the computer's sound card. This error is a lot higher than the center frequency error (~5ppm) so it may be a firmware issue, if there is only one common clock generator.
Thank you
Neoklis www.5b4az.org/