Closed adream307 closed 9 months ago
I ran your example through VCS and got this output:
Error-[SV-UIP] Unconnected interface port
testbench.sv, 9
"x"
The port 'x' of top-level module 'tc' whose type is interface 'itf' is left
unconnected. It is illegal to leave the interface ports unconnected.
Please make sure that all the interface ports are connected.
Can you explain more about why you think this should work?
sorry, It's my mistake, vsc report error on this example, but candence and dc(design compiler) wok well on this example.
I'm about to use slang as synthesis tool's parser, and this feature exists widely in existing code, dc also support this feature.
so, do you has any plan to support this feature, such like add an option --allow-top-module-interface
.
thanks
What is the behavior of those tools if the interface has a parameter in it? The reason the LRM says this is illegal is because parameters in interfaces mean that you need to know what you're connecting to in order to elaborate the contents of the module, so if a top-level module has an interface port you have no way of knowing what the parameter values are supposed to be.
I did an simple test,in the dc,if the parameter has default value,it will use the default value,otherwise dc will report an error
Ok, makes sense, they just try to default instantiate the interface and connect it. Does it work if the interface itself depends on another interface, via internal instantiation or via a port? Do they recursively instantiate interfaces via their ports?
This is now supported with the --allow-toplevel-iface-ports
flag.
This is now supported with the
--allow-toplevel-iface-ports
flag.
Thanks
Describe the bug declare top module's port with interface
To Reproduce
Additional context vcs and dc work well on this example