Miouyouyou / RockMyy

Build scripts and patches used to cross-compile 5.6-rcX kernels for RK3288 boards
MIT License
32 stars 8 forks source link

Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(179,7) #17

Closed martinmarinsalti closed 1 year ago

martinmarinsalti commented 2 years ago

Hello Miouyouyou!

I am trying to boot my Firefly RK3288 board with kernel 5.8 from this repository. The drivers seem to load fine, but it fails to mount the file system.

For some reason it is not being able to mount the root file system in mmc memory. Here are the kernel logs related to mmc memory:

SdmmcInit = 0 400
SdmmcInit = 2 0
[    0.000000][    T0] Kernel command line: init=/sbin/init root=/dev/mmcblk2p7 rw rootwait console=ttyS2,115200 quiet splash loglevel=7  acpi=off apm=off vt.global_cursor_default=0 consoleblank=0  mtdparts=rk29xxnand:0x00002000@0x00002000(uboot),0x00002000@0x00004000(misc),0x00008000@0x00006000(resource),0x00008000@0x0000e000(kernel),0x00008000@0x00016000(back),0x00010000@0x0001e000(backup),0xc00800@0x0002e000(linuxroot) storagemedia=emmc loader.timestamp=2017-06-02_17:57:28 SecureBootCheckOk=0
[    3.806123][    T1] dwmmc_rockchip ff0c0000.mmc: IDMAC supports 32-bit address mode.
[    3.814801][    T1] dwmmc_rockchip ff0c0000.mmc: Using internal DMA controller.
[    3.822979][    T1] dwmmc_rockchip ff0c0000.mmc: Version ID is 270a
[    3.830019][    T1] dwmmc_rockchip ff0c0000.mmc: DW MMC controller at irq 30,32 bit host data width,256 deep fifo
[    3.968502][    T1] mmc_host mmc0: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0)
[    3.992528][    T1] dwmmc_rockchip ff0d0000.mmc: IDMAC supports 32-bit address mode.
[    4.001233][    T1] dwmmc_rockchip ff0d0000.mmc: Using internal DMA controller.
[    4.009433][    T1] dwmmc_rockchip ff0d0000.mmc: Version ID is 270a
[    4.016460][    T1] dwmmc_rockchip ff0d0000.mmc: DW MMC controller at irq 31,32 bit host data width,256 deep fifo
[    4.028163][    T1] dwmmc_rockchip ff0d0000.mmc: Failed getting OCR mask: 0
[    4.036007][    T1] mmc_host mmc1: card is non-removable.
[    4.042105][    T1] dwmmc_rockchip ff0d0000.mmc: could not set regulator OCR (-22)
[    4.050573][    T1] dwmmc_rockchip ff0d0000.mmc: failed to enable vmmc regulator
[    4.071905][    T1] mmc_host mmc1: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0)
[    4.095916][    T1] dwmmc_rockchip ff0f0000.mmc: IDMAC supports 32-bit address mode.
[    4.104614][    T1] dwmmc_rockchip ff0f0000.mmc: Using internal DMA controller.
[    4.112819][    T1] dwmmc_rockchip ff0f0000.mmc: Version ID is 270a
[    4.119864][    T1] dwmmc_rockchip ff0f0000.mmc: DW MMC controller at irq 32,32 bit host data width,256 deep fifo
[    4.131674][    T1] mmc_host mmc2: card is non-removable.
[    4.143345][  T116] dwmmc_rockchip ff0d0000.mmc: could not set regulator OCR (-22)
[    4.150478][    T1] mmc_host mmc2: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0)
[    4.151814][  T116] dwmmc_rockchip ff0d0000.mmc: failed to enable vmmc regulator
[    4.184200][  T116] mmc_host mmc1: Bus speed (slot 0) = 300000Hz (slot req 300000Hz, actual 300000HZ div = 0)
[    4.232735][  T116] dwmmc_rockchip ff0d0000.mmc: could not set regulator OCR (-22)
[    4.242909][  T116] dwmmc_rockchip ff0d0000.mmc: failed to enable vmmc regulator
[    4.252322][   T21] mmc_host mmc2: Bus speed (slot 0) = 50000000Hz (slot req 52000000Hz, actual 50000000HZ div = 0)
[    4.252476][   T21] mmc2: new high speed MMC card at address 0001
[    4.253106][   T21] mmcblk2: mmc2:0001 BWBC3R 29.1 GiB 
[    4.253534][   T21] mmcblk2boot0: mmc2:0001 BWBC3R partition 1 4.00 MiB
[    4.254046][   T21] mmcblk2boot1: mmc2:0001 BWBC3R partition 2 4.00 MiB
[    4.254208][   T21] mmcblk2rpmb: mmc2:0001 BWBC3R partition 3 4.00 MiB, chardev (240:0)
[    4.258730][   T21]  mmcblk2: p1 p2 p3 p4 p5 p6 p7 p8
[    4.268161][  T116] mmc_host mmc1: Bus speed (slot 0) = 200000Hz (slot req 200000Hz, actual 200000HZ div = 0)
[    4.303602][  T116] dwmmc_rockchip ff0d0000.mmc: could not set regulator OCR (-22)
[    4.313674][  T116] dwmmc_rockchip ff0d0000.mmc: failed to enable vmmc regulator
[    4.376742][  T116] mmc_host mmc1: Bus speed (slot 0) = 187500Hz (slot req 100000Hz, actual 93750HZ div = 1)
[    5.851719][    T1] erofs: (device mmcblk2p7): erofs_read_superblock: cannot find valid erofs superblock
[    5.885568][    T1] erofs: (device mmcblk2p7): erofs_read_superblock: cannot find valid erofs superblock
[    5.909847][    T1] b300        30535680 mmcblk2 
[    5.909849][    T1]  driver: mmcblk
[    5.919001][    T1]   b301            4096 mmcblk2p1 94b7f94f-f139-4115-c74f-afbb0d23b695
[    5.930584][    T1]   b302            4096 mmcblk2p2 bd479d09-ba16-483f-d4d3-c5c50b443ec5
[    5.942166][    T1]   b303            4096 mmcblk2p3 3ba82700-2214-400e-adb7-c35c57c18419
[    5.953747][    T1]   b304           32768 mmcblk2p4 e8e7a655-da71-4099-d054-ea342a9f1b77
[    5.965330][    T1]   b305           32768 mmcblk2p5 d3b79b2c-d156-4f12-db5d-e39e34158d49
[    5.976903][    T1]   b306           32768 mmcblk2p6 4447ff57-ee49-4eb9-e3e9-b69b7d75f306
[    5.988476][    T1]   b307         2094080 mmcblk2p7 614e0000-0000-4b53-8000-1d28000054a9
[    6.000059][    T1]   b308        28257263 mmcblk2p8 345db86b-5432-42df-9349-f8052ee6d9b4

I think the error may be related to the following line: [ 5.851719][ T1] erofs: (device mmcblk2p7): erofs_read_superblock: cannot find valid erofs superblock

The complete log is in the following link: https://drive.google.com/file/d/1qSLFlVWPDC3_Q9mv5LwTiinX6I7hBkKz/view?usp=sharing

Parameter file with kernel command line and partitions: https://drive.google.com/file/d/1Ri7UHwTk8ddAuCUzWwg1Xp7hrBsjqM-u/view?usp=sharing

There are a total of 7 partitions set, but for some reason the kernel detects that there are 8:

[ 4.258730][ T21] mmcblk2: p1 p2 p3 p4 p5 p6 p7 p8

The goal is to reach the solution to mount the file system.

Thank you very much for your contributions, they are really useful.

Regards!