Open MrBr-github opened 2 years ago
In some cases this might be not enough In below example there are ONLY p0 and p1 interfaces exist on the DPU But they are identified as representors
root@swx-u.....2-bf1:~/work1# python3 lshca.py -w dpu ------------------------------------------------------------------------------------------------------ Dev #1 Desc: Mellanox Technologies MT42822 BlueField-2 integrated ConnectX-6 Dx network controller PN: MBF2M516A-CENOT rev. A4 PSID: MT_0000000560 SN: M........... FW: 24.32.1010 Driver: mlnx_ofed-5.5-2.1.7.0 DPUmode: Separated BFBver: DOCA_v1.2.1_BlueField_OS_Ubuntu_20.04-5.4.0-1023-bluefield-5.5-2.1.7.0-3.8.5.12027-1-aarch64 RshimDev: ------------------------------------------------------------------------------------------------------ PCI_addr | RDMA | Net | OvsBrdg | IpStat | UplnkRepr | PfRepr | VfRepr ------------------------------------------------------------------------------------------------------ 0000:03:00.0 | mlx5_0 | | | | p0 | | 0000:03:00.1 | mlx5_1 | | | | p1 | | ------------------------------------------------------------------------------------------------------
In some cases this might be not enough In below example there are ONLY p0 and p1 interfaces exist on the DPU But they are identified as representors