Open pavel1murat opened 9 months ago
Register 0x91f8 of the DTC is only 6 bits; the behavior looks to be correct.
writing to 0x91f8 gives an example of the diagnostics, the diagnostics is generated on ANY write, for example, when executing $MU2E_PCIE_UTILS_DIR/dtcInterfaceLib/JAConfig.sh
I can confirm that this problem does not happen with the ots=v2_06_11/driver=v2_04_01, that could be an additional indication of the problems with the DTC readout we're experiencing.
one more bit of information: the same diagnostics does come up in ots=v2_07_11/PCIE driver=v2_04_01 combination, so most likely it has to do with the mu2e_pcie_utils v2_07_00 vintage
the error reporting persists:
mu2etrk@mu2edaq09:~/test_stand/pasha_023>rocUtil -l 2 -a 14 -w 0x1 write_register
02-25 11:30:40.270494 mu2edev ERROR release_all: DTC1 - release_all dcs lock not held!
Merge: a14c8cd 9c91aa7 Author: eflumerf 61473357+eflumerf@users.noreply.github.com Date: Fri Feb 23 14:50:07 2024 -0600
Merge pull request #35 from Mu2e/rrivera/progressCheckpointAtCaloAndTrkVSTs
@pavel1murat do you agree this is fixed now as of https://github.com/Mu2e/mu2e_pcie_utils/pull/37 ?
after upgrading the DTC PCIE driver to version v2_09_00 on mu2edaq09 aand switching to v2_07_00 release of ots, I'm getting error diagnostics on any attempt to write to the DTC register: