MyersResearchGroup / ATACS

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Storevhd problem #35

Open buggsley opened 8 years ago

buggsley commented 8 years ago

The following is generated by:

atacs -oiPPPNPOPSPEyssv wine_example2 THE_SHOP

The problem is it uses top-level names not the component level names.

library ieee; use ieee.std_logic_1164.all;

entity THE_SHOP is port( shoppatron_rcv : in std_logic; shoppatron_send : inout std_logic; wineryshop_rcv : inout std_logic; wineryshop_send : in std_logic ); end THE_SHOP;

architecture structure of THE_SHOP is

-- internal signals declarations -- input complements signal shoppatron_rcv_bar: std_logic; signal wineryshop_send_bar: std_logic;

-- output complements signal shoppatron_send_bar: std_logic; signal wineryshop_rcv_bar: std_logic;

component n2p2 port(a1n : in std_logic; b1n : in std_logic; a1p : in std_logic; b1p : in std_logic; o : inout std_logic; obar : inout std_logic); end component;

begin i_0 : n2p2 port map(a1n=>wineryshop_send, b1n=>shoppatron_send_bar, a1p=>wineryshop_send, b1p=>shoppatron_send_bar, o=>wineryshop_rcv, obar=>wineryshop_rcv_bar);

i_1 : n2p2 port map(a1n=>shoppatron_rcv_bar, b1n=>wineryshop_rcv, a1p=>shoppatron_rcv_bar, b1p=>wineryshop_rcv, o=>shoppatron_send, obar=>shoppatron_send_bar);

-- complements of inputs shoppatron_rcv_bar <= not shoppatron_rcv after 0 ns; wineryshop_send_bar <= not wineryshop_send after 0 ns;

end structure;