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NISystemsEngineering / I2S-TDM

Provides FPGA IP for implementing I2S and TDM (Time Division Multiplexing) in LabVIEW FPGA.
Apache License 2.0
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i4s and i8s #3

Open djsftree opened 7 years ago

djsftree commented 7 years ago

Hi,

Can this easily be extended to support i4s ( 2 x data lines = 4ch ) and i8s ( 4 x data lines = 8ch)?

Thanks!

ryanpoulos commented 6 years ago

Hey fathomtreelimited,

Sorry for the delayed reply. This slipped by somehow. This is fundamentally designed around each component being a serial transfer, so it can't natively have multiple data lines. However, all that really changes is the number of serial streams you have internally, as well as changing the data type from being a scalar to being a fixed-sized array of two, four, or eight elements. So it could be done.