Add Lossy Multi-Terminal HVDC models

[rodrigomha]

To do:

• [x] Create converter variables
• [x] Create DC network variables
• [ ] Create converter constraints
• [ ] Create DC network constraints
• [ ] Test basic model

[codecov[bot]]

Codecov Report

Attention: Patch coverage is 0% with 158 lines in your changes missing coverage. Please review.

Project coverage is 76.49%. Comparing base (303c2d9) to head (c00394c). Report is 4 commits behind head on rhjd/add_ipc_models.

Files	Patch %	Lines
src/devices_models/devices/HVDCsystems.jl	0.00%	118 Missing :warning:
...els/device_constructors/hvdcsystems_constructor.jl	0.00%	39 Missing :warning:
src/core/expressions.jl	0.00%	1 Missing :warning:

Additional details and impacted files

[](https://app.codecov.io/gh/NREL-Sienna/PowerSimulations.jl/pull/1128?src=pr&el=tree&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=NREL-Sienna) ```diff @@ Coverage Diff @@ ## rhjd/add_ipc_models #1128 +/- ## ======================================================= - Coverage 77.44% 76.49% -0.96% ======================================================= Files 118 118 Lines 12658 12816 +158 ======================================================= Hits 9803 9803 - Misses 2855 3013 +158 ``` | [Flag](https://app.codecov.io/gh/NREL-Sienna/PowerSimulations.jl/pull/1128/flags?src=pr&el=flags&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=NREL-Sienna) | Coverage Δ | | |---|---|---| | [unittests](https://app.codecov.io/gh/NREL-Sienna/PowerSimulations.jl/pull/1128/flags?src=pr&el=flag&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=NREL-Sienna) | `76.49% <0.00%> (-0.96%)` | :arrow_down: | Flags with carried forward coverage won't be shown. [Click here](https://docs.codecov.io/docs/carryforward-flags?utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=NREL-Sienna#carryforward-flags-in-the-pull-request-comment) to find out more. | [Files](https://app.codecov.io/gh/NREL-Sienna/PowerSimulations.jl/pull/1128?dropdown=coverage&src=pr&el=tree&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=NREL-Sienna) | Coverage Δ | | |---|---|---| | [src/PowerSimulations.jl](https://app.codecov.io/gh/NREL-Sienna/PowerSimulations.jl/pull/1128?src=pr&el=tree&filepath=src%2FPowerSimulations.jl&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=NREL-Sienna#diff-c3JjL1Bvd2VyU2ltdWxhdGlvbnMuamw=) | `100.00% <ø> (ø)` | | | [src/core/auxiliary\_variables.jl](https://app.codecov.io/gh/NREL-Sienna/PowerSimulations.jl/pull/1128?src=pr&el=tree&filepath=src%2Fcore%2Fauxiliary_variables.jl&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=NREL-Sienna#diff-c3JjL2NvcmUvYXV4aWxpYXJ5X3ZhcmlhYmxlcy5qbA==) | `75.00% <ø> (ø)` | | | [src/core/constraints.jl](https://app.codecov.io/gh/NREL-Sienna/PowerSimulations.jl/pull/1128?src=pr&el=tree&filepath=src%2Fcore%2Fconstraints.jl&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=NREL-Sienna#diff-c3JjL2NvcmUvY29uc3RyYWludHMuamw=) | `100.00% <ø> (ø)` | | | [src/core/formulations.jl](https://app.codecov.io/gh/NREL-Sienna/PowerSimulations.jl/pull/1128?src=pr&el=tree&filepath=src%2Fcore%2Fformulations.jl&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=NREL-Sienna#diff-c3JjL2NvcmUvZm9ybXVsYXRpb25zLmps) | `96.87% <ø> (ø)` | | | [src/core/variables.jl](https://app.codecov.io/gh/NREL-Sienna/PowerSimulations.jl/pull/1128?src=pr&el=tree&filepath=src%2Fcore%2Fvariables.jl&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=NREL-Sienna#diff-c3JjL2NvcmUvdmFyaWFibGVzLmps) | `62.90% <ø> (ø)` | | | [src/core/expressions.jl](https://app.codecov.io/gh/NREL-Sienna/PowerSimulations.jl/pull/1128?src=pr&el=tree&filepath=src%2Fcore%2Fexpressions.jl&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=NREL-Sienna#diff-c3JjL2NvcmUvZXhwcmVzc2lvbnMuamw=) | `71.42% <0.00%> (-5.50%)` | :arrow_down: | | [...els/device\_constructors/hvdcsystems\_constructor.jl](https://app.codecov.io/gh/NREL-Sienna/PowerSimulations.jl/pull/1128?src=pr&el=tree&filepath=src%2Fdevices_models%2Fdevice_constructors%2Fhvdcsystems_constructor.jl&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=NREL-Sienna#diff-c3JjL2RldmljZXNfbW9kZWxzL2RldmljZV9jb25zdHJ1Y3RvcnMvaHZkY3N5c3RlbXNfY29uc3RydWN0b3Iuamw=) | `32.20% <0.00%> (-62.80%)` | :arrow_down: | | [src/devices\_models/devices/HVDCsystems.jl](https://app.codecov.io/gh/NREL-Sienna/PowerSimulations.jl/pull/1128?src=pr&el=tree&filepath=src%2Fdevices_models%2Fdevices%2FHVDCsystems.jl&utm_medium=referral&utm_source=github&utm_content=comment&utm_campaign=pr+comments&utm_term=NREL-Sienna#diff-c3JjL2RldmljZXNfbW9kZWxzL2RldmljZXMvSFZEQ3N5c3RlbXMuamw=) | `29.38% <0.00%> (-27.31%)` | :arrow_down: |

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Performance Results	Version	Precompile Time
Main	3.201761272
This Branch	3.304719633

Version	Build Time
Main-Build Time Precompile	50.230389764
Main-Build Time Postcompile	1.074673636
This Branch-Build Time Precompile	51.130797244
This Branch-Build Time Postcompile	1.218703992

Version	Build Time
Main-Solve Time Precompile	1688.296680561
Main-Solve Time Postcompile	1669.603077788
This Branch-Solve Time Precompile	529.018100733
This Branch-Solve Time Postcompile	500.058935896