useDLACore=0 error

[Vulcan-YJX]

• hardware: jetson orin agx
• system: jetpack 5.1

when i use trt to cover onnx to plan with DLA. Throw an error about ` [optimizer.cpp::checkIfDirectIOIsPossible::4316] Error Code 4: Internal Error (BuilderFlag::kDIRECT_IO specified but no conformant implementation exists)

[builder.cpp::buildSerializedNetwork::751] Error Code 2: Internal Error (Assertion engine != nullptr failed. ) `

[jaiveersinghNV]

Could you please try again with the latest Isaac ROS DP3 release?

Specifically, the command to convert the model from .onnx to .plan has been updated to use an additional flag for --allowGPUFallback:

/usr/src/tensorrt/bin/trtexec --saveEngine=/tmp/models/bi3d/bi3dnet_featnet.plan \
--onnx=/tmp/models/bi3d/featnet.onnx \
--int8 --useDLACore=0 --allowGPUFallback &&
/usr/src/tensorrt/bin/trtexec --saveEngine=/tmp/models/bi3d/bi3dnet_segnet.plan \
--onnx=/tmp/models/bi3d/segnet.onnx \
--int8 --useDLACore=0 --allowGPUFallback

[Vulcan-YJX]

Thanks, it works.