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NXP / i3c-slave-design

MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.
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i3c_autonomous_reg.v #35

Closed tsuhuai closed 2 years ago

tsuhuai commented 2 years ago

[`UPPER - : 8 ] The above words appear many times while wreg and _woregs are assigned. (line 217, 219, 223, 224, 228, 231, 232, 235)

I use 'auton_wrap_full' as my top module. The i3c_autotonomous_reg.v did not pass the ncverilog simulator. Did I miss anything?

pkimelman-nxp commented 2 years ago

It is defined in the same file as `define UPPER (((i+1)*8)-1)

It is used inside of a loop like: for (i = 0; i <= MAX_REG; i = i + 1) begin : auto_regs

So, this is walking the vector of regs. For example, when i=0, it is (((0+1)8)-1) which is 8-1 which is 7. So, this becomes [7-:8] which is same as [7:0]. wo_regs is defined as: output [(8MAX_REG)+7:0] wo_regs, // regs written by Master - raw So, this is valid for the whole loop. If you are connecting output and input that matches your MAX_REG def, you should not have any problem.

tsuhuai commented 2 years ago

Thanks. There is no problem when I try it at home, however it did fail in the office. I will compare the environment between these two.