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NYU-Processor-Design / nyu-core

The code and tests for the RISCV-32I compatible core for the NYU Processor Design VIP team.
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update L1_data_cache.md, .sv #109

Closed codeadpool closed 10 months ago

codecov[bot] commented 10 months ago

Codecov Report

Merging #109 (e511854) into main (0e062d5) will not change coverage. The diff coverage is n/a.

@@           Coverage Diff           @@
##             main     #109   +/-   ##
=======================================
  Coverage   88.60%   88.60%           
=======================================
  Files          10       10           
  Lines         193      193           
=======================================
  Hits          171      171           
  Misses         22       22
ShinyMiraidon commented 10 months ago

Please add a test for the L1 Cache module (see the development guidelines for more information) and fill in the module outline for the L1 data cache as well (linked here)