Closed ShinyMiraidon closed 9 months ago
Need to finish designing and outlining the control signals and logic used to control the CPU core
As part of this, need to figure out how to implement the SYSTEM I type instructions described in sections 2.8 and 2.9 of the riscv-spec-v2.2 document
Need to finish designing and outlining the control signals and logic used to control the CPU core