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NYU-Processor-Design / nyu-mem

The code and tests necessary to perform all memory related functions for the NYU Processor Design VIP team. This includes RAM, ROM, and a memory controller among other components as needed.
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Module: Memory Control Unit #2

Open SPD3 opened 1 year ago

SPD3 commented 1 year ago

The responsibility of this component is to translate between the AHB sub signals that are passed over the AHB to Memory interface determined in #1 to the signals expected by an OpenRAM memory module. An example of the simulation module output by OpenRAM can be found here.

SPD3 commented 1 year ago

@nickelpro Just to be clear, the link to the example of the simulation module output by OpenRAM is just demonstrating the format of the OpenRam messages that the memory control unit is translating to, right?