Add more thermal vias under BD9D321EFJ chips

[randomplum]

Current design has a ΔT chip-to-PCB of 50℃ at maximum power. We're not in danger of thermal shutdown but this value can be improved by increasing thermal transfer to internal GND planes with more thermal vias

[randomplum]

Closed by 682524a0b852098a56be4acbe4eda5c2a8248742