Is your feature request related to a problem? Please describe.
The e200 core in my application (Freescale MPC5604) uses 32-bit registers and supports VLE instructions. None of the existing 32-bit Power PC languages support VLE instructions. Power PC VLE instructions are currently only supported on Power PC languages with 64-bit registers.
Describe the solution you'd like
I would like to see this processor variant added to Ghidra. Although it initially seemed trivial, my attempts at doing this myself were unsuccessful.
Describe alternatives you've considered
Using the 64 bit language "PowerISA-VLE-64-32addr" with 32-bit VLE code causes numerous issues with the decompiler. Wrong datatypes, unnecessary type casts and suspected issues with signed math operations. I also suspect the decompiler warning "Could not reconcile some variable overlaps" is caused by this mismatch.
Is your feature request related to a problem? Please describe. The e200 core in my application (Freescale MPC5604) uses 32-bit registers and supports VLE instructions. None of the existing 32-bit Power PC languages support VLE instructions. Power PC VLE instructions are currently only supported on Power PC languages with 64-bit registers.
Describe the solution you'd like I would like to see this processor variant added to Ghidra. Although it initially seemed trivial, my attempts at doing this myself were unsuccessful.
Describe alternatives you've considered Using the 64 bit language "PowerISA-VLE-64-32addr" with 32-bit VLE code causes numerous issues with the decompiler. Wrong datatypes, unnecessary type casts and suspected issues with signed math operations. I also suspect the decompiler warning "Could not reconcile some variable overlaps" is caused by this mismatch.
Thank you.