x86: Zero upper bits of 64-bit registers for XCHG and CMPXCHG8B without REX prefix

[Sleigh-InSPECtor]

The CMPXCHG8B and XCHG mem constructors (with opsize=1) are missing check_Reg constructors to zero the upper 32-bits when the destination registers are 64-bit.

e.g.

• 0fc70c2500000000 CMPXCHG8B qword ptr [0x0] with RAX=0xaaaaaaaaaaaaaaaa, RDX=0xdddddddddddddddd, mem[0x0]=0011223344556677

  • Hardware Reference (AMD CPU & Intel CPU): { RAX=0x00000000_33221100, RDX=0x00000000_77665544 }
  • x86:LE:64:default (Existing): "CMPXCHG8B qword ptr [0x0]" { RAX=0xaaaaaaaa_33221100, RDX=0xdddddddd_77665544 }
  • x86:LE:64:default (This patch): "CMPXCHG8B qword ptr [0x0]" { RAX=0x00000000_33221100, RDX=0x00000000_77665544 }

• 8701 XCHG dword ptr [RCX],EAX with RAX=0xaaaaaaaaaaaaaaaa, RCX=0, mem[0x0]=00112233

  • Hardware Reference (AMD CPU & Intel CPU): { RAX=0x00000000_33221100 }
  • x86:LE:64:default (Existing): XCHG dword ptr [RCX],EAX" { RAX=0xaaaaaaaa_33221100 }
  • x86:LE:64:default (This patch): XCHG dword ptr [RCX],EAX" { RAX=0x00000000_33221100 }

(Note: this is already handled correctly in the XCHG reg,reg form).