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NetFPGA / NetFPGA-PLUS

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Help wanted with NetFPGA-PLUS Reference Switch #6

Open lukaszkwiatkowskii opened 1 year ago

lukaszkwiatkowskii commented 1 year ago

Hi. I changed the project "reference switch" to seven ports: 0, 1, 2, 3, 4, 5 - normal ports, 6 - cpu port. 0 - src_port: 0x01, 1 - src_port: 0x02, 2 - src_port: 0x04, 3 - src_port: 0x08, 4 - src_port: 0x10, 5 - src_port: 0x20, 6 - src_port: 0x00, 0 - dst_port: 0x00, 1 - dst_port: 0x00, 2 - dst_port: 0x00, 3 - dst_port: 0x00, 4 - dst_port: 0x00, 5 - dst_port: 0x00, 6 - dst_port: 0x3f,

When I want to send packets from ports: 0,1,2,3,4,5 -> 6 it works fine, but when I want to send packets from port: 6 -> 0,1,2,3,4,5 it only sends to 0,1,4.

Changes: input_arbiter.v - "assign next_queue = (cur_queue == NUM_QUEUES-1) ? 0 : cur_queue + 1;". output_queues.v - "assign oq = s_axis_tuser[(DST_POS+(NUM_QUEUES-1)):DST_POS];".

aomtoku commented 10 months ago

Hi, I guess assuming you have 6 CMAC ports and 1 DMA interface on the pipeline. You want to send a packet from host side and you expects packets to be sent to all 6 ports because any MAC addresses are not learned. I am not sure but maybe you need to change this lines. Original codes supports two CMAC ports, so when the packet is missed on learning CAM, then missed packet is forwarded to default defined ports. This explains why your packet is forwarded to 0,1 ports, but I am not sure why port 4 as well. https://github.com/NetFPGA/NetFPGA-PLUS/blob/main/hw/lib/std/switch_output_port_lookup_v1_0_1/hdl/switch_output_port_lookup.v#L140

localparam DEFAULT_MISS_OUTPUT_PORTS = 8'h55;

I hope this will be helpful.